AMD {SoC, AGESA, binaryPI}: Don't use both of _ADR and _HID
PCI devices starting from 18 are processor configuration devices for each node and are not a bus itself. According to ACPI specification 6.3 section 6.1.5: "... _HID object must be used to describe any device that will be enumerated by OSPM. OSPM only enumerates a device when no bus enumerator can detect the device ID. ... Use the _ADR object to describe devices enumerated by bus enumerators other than OSPM." PCI device 18 with its functions has a standard enumerator, which is PCI enumerator so it needs a _ADR. Create a separate ACPI device for the processor configuration space. This fixes the ACPI compliance problem from CB:36318. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Ie7b45ce8d9e4fdd80d90752bf51bba4d30041507 Reviewed-on: https://review.coreboot.org/c/coreboot/+/37835 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -18,13 +18,16 @@ External (TOM1)
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External (TOM2)
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Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
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Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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/* Describe the Northbridge devices */
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Device(AMRT) {
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Name(_ADR, 0x00000000)
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} /* end AMRT */
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Device(PCSD) { /* Processor configuration space devices */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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}
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/* The internal GFX bridge */
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Device(AGPB) {
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Name(_ADR, 0x00010000)
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@ -17,7 +17,6 @@
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External (TOM1)
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External (TOM2)
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Name(_HID, EISAID("PNP0A03")) /* PCI Express Root Bridge */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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/* Describe the Northbridge devices */
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@ -45,6 +44,10 @@ Device(AMRT) {
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Name(_ADR, 0x00000000)
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} /* end AMRT */
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Device(PCSD) { /* Processor configuration space devices */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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}
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/* Dev2 is also an external GFX bridge */
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Device(PBR2) {
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Name(_ADR, 0x00020000)
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@ -18,7 +18,6 @@ External (TOM1)
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External (TOM2)
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Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
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Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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/* Describe the Northbridge devices */
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@ -45,6 +44,10 @@ Device(AMRT) {
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Name(_ADR, 0x00000000)
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} /* end AMRT */
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Device(PCSD) { /* Processor configuration space devices */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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}
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/* Gpp 0 */
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Device(PBR4) {
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Name(_ADR, 0x00020001)
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@ -17,7 +17,6 @@
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External (TOM1)
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External (TOM2)
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Name(_HID, EISAID("PNP0A03")) /* PCI Express Root Bridge */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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/* Describe the Northbridge devices */
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@ -45,6 +44,10 @@ Device(AMRT) {
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Name(_ADR, 0x00000000)
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} /* end AMRT */
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Device(PCSD) { /* Processor configuration space devices */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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}
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/* Dev2 is also an external GFX bridge */
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Device(PBR2) {
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Name(_ADR, 0x00020000)
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@ -18,7 +18,6 @@ External (TOM1)
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External (TOM2)
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Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
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Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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/* Describe the Northbridge devices */
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@ -45,6 +44,10 @@ Device(AMRT) {
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Name(_ADR, 0x00000000)
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} /* end AMRT */
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Device(PCSD) { /* Processor configuration space devices */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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}
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/* Gpp 0 */
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Device(PBR4) {
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Name(_ADR, 0x00020001)
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@ -18,7 +18,6 @@ External (TOM1)
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External (TOM2)
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Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
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Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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/* Describe the Northbridge devices */
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@ -45,6 +44,10 @@ Device(AMRT) {
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Name(_ADR, 0x00000000)
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} /* end AMRT */
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Device(PCSD) { /* Processor configuration space devices */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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}
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/* Gpp 0 */
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Device(PBR4) {
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Name(_ADR, 0x00020001)
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@ -19,7 +19,6 @@ External (TOM1)
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External (TOM2)
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Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
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Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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/* Describe the Northbridge devices */
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@ -46,6 +45,10 @@ Device(AMRT) {
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Name(_ADR, 0x00000000)
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} /* end AMRT */
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Device(PCSD) { /* Processor configuration space devices */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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}
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/* Internal Graphics */
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Device(IGFX) {
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Name(_ADR, 0x00010000)
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@ -19,7 +19,6 @@ External (TOM1)
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External (TOM2)
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Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
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Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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/* Describe the Northbridge devices */
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@ -46,6 +45,10 @@ Device(AMRT) {
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Name(_ADR, 0x00000000)
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} /* end AMRT */
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Device(PCSD) { /* Processor configuration space devices */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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}
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/* Internal Graphics */
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Device(IGFX) {
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Name(_ADR, 0x00010000)
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