From 72bb66eb9cecf94b66a4aca3586165d5495fcfdb Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Fri, 2 Oct 2015 10:59:13 -0700 Subject: [PATCH] x86/bootblock: Use LDFLAGS_bootblock to enable garbage collection The x86 bootblock linking is a mess. The bootblock is treated in a very special manner, and never received the update to link-time garbage collection. On newer x86 platforms, the boot media is no longer memory-mapped. That means we need to do a lot more setup in the bootblock. ROMCC is unsuitable for this task, and walkcbfs only works on memory-mapped CBFS. We need to revise the x86 bootflow for this new case. The approach this patch series takes is to perform CAR setup in the bootblock, and load the following stage (either romstage or verstage) from the boot media. This approach is not new, but has been done on our ARM ports for years. Since we will be adding .c files to the bootblock, it is prudent to use link-time garbage collection. This is also consistent to how we do things on other architectures. Unification FTW! Change-Id: I16b78456df56e0053984a9aca9367e2542adfdc9 Signed-off-by: Alexandru Gagniuc Reviewed-on: http://review.coreboot.org/11781 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/arch/x86/Makefile.inc | 4 ++-- src/arch/x86/failover.ld | 2 ++ src/arch/x86/id.ld | 2 +- src/cpu/dmp/vortex86ex/biosdata.ld | 22 +++++++++++----------- src/cpu/dmp/vortex86ex/biosdata_ex.ld | 6 +++--- src/cpu/intel/fit/fit.ld | 2 +- src/cpu/x86/16bit/reset16.ld | 2 +- src/northbridge/via/vx800/romstrap.ld | 2 +- src/northbridge/via/vx900/romstrap.ld | 2 +- src/southbridge/nvidia/ck804/romstrap.ld | 2 +- src/southbridge/nvidia/mcp55/romstrap.ld | 2 +- src/southbridge/sis/sis966/romstrap.ld | 2 +- src/southbridge/via/k8t890/romstrap.ld | 2 +- 13 files changed, 27 insertions(+), 25 deletions(-) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index f16edcd453..1bda5f6b8c 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -106,9 +106,9 @@ $(objgenerated)/bootblock.inc: $(src)/arch/x86/$(subst ",,$(CONFIG_BOOTBLOCK_SOU $(objcbfs)/bootblock.debug: $(obj)/arch/x86/bootblock.bootblock.o $(obj)/arch/x86/bootblock.bootblock.ld @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32),y) - $(LD_bootblock) -m elf_i386 --oformat elf32-i386 -static -o $@ -L$(obj) $< -T $(obj)/arch/x86/bootblock.bootblock.ld + $(LD_bootblock) $(LDFLAGS_common) -m elf_i386 --oformat elf32-i386 -static -o $@ -L$(obj) $< -T $(obj)/arch/x86/bootblock.bootblock.ld else - $(LD_bootblock) -m elf_x86_64 --oformat elf64-x86-64 -static -o $@ -L$(obj) $< -T $(obj)/arch/x86/bootblock.bootblock.ld + $(LD_bootblock) $(LDFLAGS_common) -m elf_x86_64 --oformat elf64-x86-64 -static -o $@ -L$(obj) $< -T $(obj)/arch/x86/bootblock.bootblock.ld endif diff --git a/src/arch/x86/failover.ld b/src/arch/x86/failover.ld index d7aa47e249..94d5263bfb 100644 --- a/src/arch/x86/failover.ld +++ b/src/arch/x86/failover.ld @@ -18,6 +18,8 @@ * Foundation, Inc. */ +ENTRY(reset_vector) + MEMORY { rom : ORIGIN = 0xffff0000, LENGTH = 64K } diff --git a/src/arch/x86/id.ld b/src/arch/x86/id.ld index cfd091dc17..99d13f14f3 100644 --- a/src/arch/x86/id.ld +++ b/src/arch/x86/id.ld @@ -1,6 +1,6 @@ SECTIONS { . = (0xffffffff - CONFIG_ID_SECTION_OFFSET) - (__id_end - __id_start) + 1; .id (.): { - *(.id) + KEEP(*(.id)) } } diff --git a/src/cpu/dmp/vortex86ex/biosdata.ld b/src/cpu/dmp/vortex86ex/biosdata.ld index fd2bb339e5..c1f50c4637 100644 --- a/src/cpu/dmp/vortex86ex/biosdata.ld +++ b/src/cpu/dmp/vortex86ex/biosdata.ld @@ -29,56 +29,56 @@ SECTIONS { . = 0xffffbc00; .dmp_reserved (.): { - *(.dmp_reserved) + KEEP(*(.dmp_reserved)) } . = 0xffffc000; .dmp_kbd_fw_part2 (.): { - *(.dmp_kbd_fw_part2) + KEEP(*(.dmp_kbd_fw_part2)) } . = 0xffffd000; .dmp_mtbf_low_cnt (.): { - *(.dmp_mtbf_low_cnt) + KEEP(*(.dmp_mtbf_low_cnt)) } . = 0xffffe000; .dmp_kbd_fw_part1 (.): { - *(.dmp_kbd_fw_part1) + KEEP(*(.dmp_kbd_fw_part1)) } . = 0xfffff000; .dmp_spi_flash_disk_driver (.): { - *(.dmp_spi_flash_disk_driver) + KEEP(*(.dmp_spi_flash_disk_driver)) } . = 0xfffff800; .dmp_frontdoor (.): { - *(.dmp_frontdoor) + KEEP(*(.dmp_frontdoor)) } . = 0xfffffe00; .dmp_isoinfo (.): { - *(.dmp_isoinfo) + KEEP(*(.dmp_isoinfo)) } . = 0xffffffa0; .dmp_isodata_checksum (.): { - *(.dmp_isodata_checksum) + KEEP(*(.dmp_isodata_checksum)) } . = 0xffffffb0; .dmp_mac (.): { - *(.dmp_mac) + KEEP(*(.dmp_mac)) } . = 0xffffffb8; .dmp_mtbf_limit (.): { - *(.dmp_mtbf_limit) + KEEP(*(.dmp_mtbf_limit)) } . = 0xffffffc0; .dmp_isodata (.): { - *(.dmp_isodata) + KEEP(*(.dmp_isodata)) } } diff --git a/src/cpu/dmp/vortex86ex/biosdata_ex.ld b/src/cpu/dmp/vortex86ex/biosdata_ex.ld index 4d8441c748..8930d80240 100644 --- a/src/cpu/dmp/vortex86ex/biosdata_ex.ld +++ b/src/cpu/dmp/vortex86ex/biosdata_ex.ld @@ -20,16 +20,16 @@ SECTIONS { . = 0xfffffd00; .a9123_crossbar_config (.): { - *(.a9123_crossbar_config) + KEEP(*(.a9123_crossbar_config)) } . = 0xffffffb6; .a9123_strap_1 (.): { - *(.a9123_strap_1) + KEEP(*(.a9123_strap_1)) } . = 0xffffffbb; .a9123_strap_2 (.): { - *(.a9123_strap_2) + KEEP(*(.a9123_strap_2)) } } diff --git a/src/cpu/intel/fit/fit.ld b/src/cpu/intel/fit/fit.ld index 9ccfe82c5f..5817e1ded2 100644 --- a/src/cpu/intel/fit/fit.ld +++ b/src/cpu/intel/fit/fit.ld @@ -1,6 +1,6 @@ SECTIONS { . = 0xffffffc0; .fit_pointer (.): { - *(.fit_pointer) + KEEP(*(.fit_pointer)) } } diff --git a/src/cpu/x86/16bit/reset16.ld b/src/cpu/x86/16bit/reset16.ld index a31a580d12..1730992434 100644 --- a/src/cpu/x86/16bit/reset16.ld +++ b/src/cpu/x86/16bit/reset16.ld @@ -9,7 +9,7 @@ SECTIONS { _ROMTOP = 0xfffffff0; . = _ROMTOP; .reset . : { - *(.reset) + *(.reset); . = 15 ; BYTE(0x00); } diff --git a/src/northbridge/via/vx800/romstrap.ld b/src/northbridge/via/vx800/romstrap.ld index cddb48262e..a3d6a77b26 100644 --- a/src/northbridge/via/vx800/romstrap.ld +++ b/src/northbridge/via/vx800/romstrap.ld @@ -21,6 +21,6 @@ SECTIONS { . = (0xffffffff - 0x2c) - (__romstrap_end - __romstrap_start) + 1; .romstrap (.): { - *(.romstrap) + KEEP(*(.romstrap)) } } diff --git a/src/northbridge/via/vx900/romstrap.ld b/src/northbridge/via/vx900/romstrap.ld index fc63c050d9..d27e9df9ba 100644 --- a/src/northbridge/via/vx900/romstrap.ld +++ b/src/northbridge/via/vx900/romstrap.ld @@ -22,6 +22,6 @@ SECTIONS { . = (0x100000000 - 0x2c) - (__romstrap_end - __romstrap_start); .romstrap (.): { - *(.romstrap) + KEEP(*(.romstrap)) } } diff --git a/src/southbridge/nvidia/ck804/romstrap.ld b/src/southbridge/nvidia/ck804/romstrap.ld index e75e6a4be0..1d074ab7a4 100644 --- a/src/southbridge/nvidia/ck804/romstrap.ld +++ b/src/southbridge/nvidia/ck804/romstrap.ld @@ -21,6 +21,6 @@ SECTIONS { . = (0xffffffff - 0x10) - (__romstrap_end - __romstrap_start) + 1; .romstrap (.): { - *(.romstrap) + KEEP(*(.romstrap)) } } diff --git a/src/southbridge/nvidia/mcp55/romstrap.ld b/src/southbridge/nvidia/mcp55/romstrap.ld index 05685be497..ad2bf05bde 100644 --- a/src/southbridge/nvidia/mcp55/romstrap.ld +++ b/src/southbridge/nvidia/mcp55/romstrap.ld @@ -22,6 +22,6 @@ SECTIONS { . = (0xffffffff - 0x10) - (__romstrap_end - __romstrap_start) + 1; .romstrap (.): { - *(.romstrap) + KEEP(*(.romstrap)) } } diff --git a/src/southbridge/sis/sis966/romstrap.ld b/src/southbridge/sis/sis966/romstrap.ld index 05685be497..ad2bf05bde 100644 --- a/src/southbridge/sis/sis966/romstrap.ld +++ b/src/southbridge/sis/sis966/romstrap.ld @@ -22,6 +22,6 @@ SECTIONS { . = (0xffffffff - 0x10) - (__romstrap_end - __romstrap_start) + 1; .romstrap (.): { - *(.romstrap) + KEEP(*(.romstrap)) } } diff --git a/src/southbridge/via/k8t890/romstrap.ld b/src/southbridge/via/k8t890/romstrap.ld index 71349e09ff..cf17b368a2 100644 --- a/src/southbridge/via/k8t890/romstrap.ld +++ b/src/southbridge/via/k8t890/romstrap.ld @@ -24,6 +24,6 @@ SECTIONS { . = (0xffffffff - 0x2c) - (__romstrap_end - __romstrap_start) + 1; .romstrap (.): { - *(.romstrap) + KEEP(*(.romstrap)) } }