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mb/google/brya/var/kuldax: Add fw_config and configurate AUX pin 

Add fw_config and configurate AUX pin for MB USB Type-C.
MB USB3 doesn't have re-timer, thus have to configurate the AUX pin.

BUG=b:275335023
TEST=build pass

Change-Id: I1334dcbaec6de1707c6892efbebaf8d460ba8648
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76348
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bob Moragues <moragues@google.com>
Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
This commit is contained in:
David Wu 2023-07-06 16:59:57 +08:00 committed by Eric Lai
parent a959f0ad76
commit 72d7181e4f
3 changed files with 25 additions and 0 deletions
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5
src/mainboard/google/brya/variants/kuldax/gpio.c
View File

@ -25,6 +25,11 @@ static const struct pad_config override_gpio_table[] = {
/* B8 : ISH_I2C1_SCL ==> PCH_I2C_MISCB_SCL */
PAD_CFG_NF_LOCK(GPP_B8, NONE, NF2, LOCK_CONFIG),
/* C3 : SML0CLK ==> USB_C0_AUX_DC_P */
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF6),
/* C4 : SML0DATA ==> USB_C0_AUX_DC_N */
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF6),
/* D0 : ISH_GP0 ==> NC */
PAD_NC_LOCK(GPP_D0, NONE, LOCK_CONFIG),
/* D1 : ISH_GP1 ==> NC */

14
src/mainboard/google/brya/variants/kuldax/overridetree.cb
View File

@ -9,6 +9,10 @@ fw_config
option BJ_POWER_65W 2
option BJ_POWER_135W 3
end
field MB_USBC 6 7
option TC_USB4 0
option TC_USB3 1
end
end
chip soc/intel/alderlake
@ -135,7 +139,17 @@ chip soc/intel/alderlake
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
end
device ref tbt_pcie_rp0 on
probe MB_USBC TC_USB4
end
device ref tbt_pcie_rp1 on
probe MB_USBC TC_USB4
end
device ref tbt_pcie_rp2 on
probe MB_USBC TC_USB4
end
device ref tcss_dma0 on
probe MB_USBC TC_USB4
chip drivers/intel/usb4/retimer
register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
use tcss_usb3_port1 as dfp[0].typec_port

6
src/mainboard/google/brya/variants/kuldax/variant.c
View File

@ -14,4 +14,10 @@ void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
{
config->cnvi_bt_audio_offload = fw_config_probe(FW_CONFIG(AUDIO,
NAU88L25B_I2S));
if (fw_config_probe(FW_CONFIG(MB_USBC, TC_USB3))) {
config->tcss_aux_ori = 1;
config->typec_aux_bias_pads[0].pad_auxp_dc = GPP_C3;
config->typec_aux_bias_pads[0].pad_auxn_dc = GPP_C4;
}
}