issue 51 and 52: set mtrr for ap before stop it, and _RAMBASE above 1M
support and pgtbl after 1M support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2142 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Yinghai Lu
parent
f42e1770f9
commit
72ee9b0ebe
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@ -15,6 +15,7 @@
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/*
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* Written by Johan Rydberg, based on work by Daniel Kahlin.
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* Rewritten by Eric Biederman
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* 2005.12 yhlu add linuxbios_ram cross the vga font buffer handling
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*/
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/*
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* We use ELF as output format. So that we can
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@ -91,7 +92,8 @@ SECTIONS
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_stack = .;
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.stack . : {
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/* Reserve a stack for each possible cpu */
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. = (CONFIG_MAX_CPUS * STACK_SIZE) ;
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/* the stack for ap will be put after pgtbl in 1M to CONFIG_LB_MEM_TOPK range when VGA and ROM_RUN and CONFIG_LB_MEM_TOPK>1024*/
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. = ((CONFIG_CONSOLE_VGA || CONFIG_PCI_ROM_RUN)&&(_RAMBASE<0x100000)&&((CONFIG_LB_MEM_TOPK<<10)>0x100000) ) ? STACK_SIZE : (CONFIG_MAX_CPUS*STACK_SIZE);
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}
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_estack = .;
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_heap = .;
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@ -106,6 +108,9 @@ SECTIONS
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*/
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_ram_seg = _text;
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_eram_seg = _eheap;
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_bogus = ASSERT( !((CONFIG_CONSOLE_VGA || CONFIG_PCI_ROM_RUN) && ((_ram_seg<0xa0000) && (_eram_seg>0xa0000))) , "please increase CONFIG_LB_MEM_TOPK and if still fail, try to set _RAMBASE more than 1M");
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/DISCARD/ : {
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*(.comment)
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*(.note)
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@ -69,3 +69,43 @@ static inline __attribute__((always_inline)) void clear_1m_ram(void)
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#endif
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);
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}
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/* be warned, this file will be used by core other than core 0/node 0 or core0/node0 when cpu_reset*/
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static inline __attribute__((always_inline)) void set_1m_ram(void)
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{
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__asm__ volatile (
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/* disable cache */
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"movl %%cr0, %%eax\n\t"
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"orl $(0x1<<30),%%eax\n\t"
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"movl %%eax, %%cr0\n\t"
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/* enable caching for first 1M using variable mtrr */
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"movl $0x200, %%ecx\n\t"
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"xorl %%edx, %%edx\n\t"
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"movl $(0 | 6), %%eax\n\t"
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// "movl $(0 | MTRR_TYPE_WRBACK), %%eax\n\t"
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"wrmsr\n\t"
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"movl $0x201, %%ecx\n\t"
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"movl $0x0000000f, %%edx\n\t"
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#if CONFIG_USE_INIT
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"movl %%esi, %%eax\n\t"
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#else
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"movl $((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), %%eax\n\t"
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#endif
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"wrmsr\n\t"
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/* enable cache */
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"movl %%cr0, %%eax\n\t"
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"andl $0x9fffffff,%%eax\n\t"
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"movl %%eax, %%cr0\n\t"
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// "invd\n\t" // Is the BSP done with mem init?
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:
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:
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#if CONFIG_USE_INIT
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"S"((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800)
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#endif
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);
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}
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@ -48,13 +48,9 @@ static void post_cache_as_ram(unsigned cpu_reset)
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if(cpu_reset==0) { // cpu_reset don't need to clear it
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clear_1m_ram();
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}
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#if 0
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int i;
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for(i=0;i<0x800000;i++) {
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outb(0x66, 0x80);
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else {
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set_1m_ram();
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}
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#endif
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__asm__ volatile (
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/* set new esp */ /* before _RAMBASE */
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@ -257,6 +257,7 @@ static unsigned init_cpus(unsigned cpu_init_detectedx)
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lapic_write(LAPIC_MSG_REG, (apicid<<24) | 0x44); // bsp can not check it before stop_this_cpu
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disable_cache_as_ram(); // inline
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set_1m_ram(); // inline
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stop_this_cpu(); // inline, it will stop all cores except node0/core0 the bsp ....
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}
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@ -1,3 +1,8 @@
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/*
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2005.12 yhlu add linuxbios_ram cross the vga font buffer handling
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2005.12 yhlu add _RAMBASE above 1M support for SMP
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*/
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#include <cpu/x86/lapic.h>
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#include <delay.h>
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#include <string.h>
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@ -9,7 +14,6 @@
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#include <smp/spinlock.h>
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#include <cpu/cpu.h>
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#if CONFIG_SMP == 1
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/* This is a lot more paranoid now, since Linux can NOT handle
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@ -19,6 +23,32 @@
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* We actually handling that case by noting which cpus startup
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* and not telling anyone about the ones that dont.
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*/
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static unsigned long get_valid_start_eip(unsigned long orig_start_eip)
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{
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return (unsigned long)orig_start_eip & 0xfffff; // 20 bit
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}
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static void copy_secondary_start_to_1m_below(void)
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{
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#if _RAMBASE > 0x100000
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extern char _secondary_start[];
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extern char _secondary_start_end[];
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unsigned long code_size;
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unsigned long start_eip;
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/* _secondary_start need to be masked 20 above bit, because 16 bit code in secondary.S
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Also We need to copy the _secondary_start to the below 1M region
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*/
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start_eip = get_valid_start_eip((unsigned long)_secondary_start);
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code_size = (unsigned long)_secondary_start_end - (unsigned long)_secondary_start;
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/* copy the _secondary_start to the ram below 1M*/
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memcpy(start_eip, (unsigned long)_secondary_start, code_size);
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printk_debug("start_eip=0x%08lx, offset=0x%08lx, code_size=0x%08lx\n", start_eip, ((unsigned long)_secondary_start - start_eip), code_size);
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#endif
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}
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static int lapic_start_cpu(unsigned long apicid)
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{
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int timeout;
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@ -87,8 +117,8 @@ static int lapic_start_cpu(unsigned long apicid)
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return 0;
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}
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start_eip = (unsigned long)_secondary_start;
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printk_spew("start_eip=0x%08lx\n", start_eip);
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start_eip = get_valid_start_eip((unsigned long)_secondary_start);
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printk_debug("start_eip=0x%08lx\n", start_eip);
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num_starts = 2;
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@ -193,7 +223,25 @@ int start_cpu(device_t cpu)
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index = ++last_cpu_index;
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/* Find end of the new processors stack */
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#if (CONFIG_LB_MEM_TOPK>1024) && (_RAMBASE < 0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1))
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if(index<1) { // only keep bsp on low
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stack_end = ((unsigned long)_estack) - (STACK_SIZE*index) - sizeof(struct cpu_info);
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} else {
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// for all APs, let use stack after pgtbl, 20480 is the pgtbl size for every cpu
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stack_end = 0x100000+(20480 + STACK_SIZE)*CONFIG_MAX_CPUS - (STACK_SIZE*index);
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#if (0x100000+(20480 + STACK_SIZE)*CONFIG_MAX_CPU) > (CONFIG_LB_MEM_TOPK<<10)
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#warning "We may need to increase CONFIG_LB_MEM_TOPK, it need to be more than (0x100000+(20480 + STACK_SIZE)*CONFIG_MAX_CPU)\n"
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#endif
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if(stack_end > (CONFIG_LB_MEM_TOPK<<10)) {
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printk_debug("start_cpu: Please increase the CONFIG_LB_MEM_TOPK more than %dK\n", stack_end>>10);
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die("Can not go on\n");
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}
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stack_end -= sizeof(struct cpu_info);
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}
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#else
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stack_end = ((unsigned long)_estack) - (STACK_SIZE*index) - sizeof(struct cpu_info);
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#endif
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/* Record the index and which cpu structure we are using */
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info = (struct cpu_info *)stack_end;
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@ -251,6 +299,7 @@ static void initialize_other_cpus(struct bus *cpu_bus)
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int old_active_count, active_count;
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device_t cpu;
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/* Loop through the cpus once getting them started */
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for(cpu = cpu_bus->children; cpu ; cpu = cpu->sibling) {
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if (cpu->path.type != DEVICE_PATH_APIC) {
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continue;
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@ -328,6 +377,8 @@ void initialize_cpus(struct bus *cpu_bus)
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/* Find the device structure for the boot cpu */
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info->cpu = alloc_find_dev(cpu_bus, &cpu_path);
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copy_secondary_start_to_1m_below(); // why here? In case some day we can start core1 in amd_sibling_init
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/* Initialize the bootstrap processor */
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cpu_initialize();
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@ -3,7 +3,7 @@
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/lapic_def.h>
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.text
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.globl _secondary_start
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.globl _secondary_start, _secondary_start_end
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.balign 4096
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_secondary_start:
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.code16
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@ -52,5 +52,5 @@ gdtaddr:
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.word gdt_limit /* the table limit */
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.long gdt /* we know the offset */
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_secondary_start_end:
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.code32
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@ -1,3 +1,7 @@
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/*
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2005.12 yhlu add linuxbios_ram cross the vga font buffer handling
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*/
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#include <console/console.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/pae.h>
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@ -49,7 +53,25 @@ void *map_2M_page(unsigned long page)
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struct pde pd[2048];
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struct pde pdp[512];
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} __attribute__ ((packed));
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#if (CONFIG_LB_MEM_TOPK>1024) && (_RAMBASE<0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1))
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/*
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pgtbl is too big, so use last one 1M before CONFIG_LB_MEM_TOP, otherwise for 8 way dual core with vga support will push stack and heap cross 0xa0000,
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and that region need to be used as vga font buffer. Please make sure set CONFIG_LB_MEM_TOPK=2048 in MB Config
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*/
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struct pg_table *pgtbl = 0x100000; //1M
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unsigned x_end = 0x100000 + sizeof(struct pg_table) * CONFIG_MAX_CPUS;
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#if (0x100000+20480*CONFIG_MAX_CPU) > (CONFIG_LB_MEM_TOPK<<10)
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#warning "We may need to increase CONFIG_LB_MEM_TOPK, it need to be more than (0x100000+20480*CONFIG_MAX_CPU)\n"
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#endif
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if(x_end > (CONFIG_LB_MEM_TOPK<<10)) {
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printk_debug("map_2M_page: Please increase the CONFIG_LB_MEM_TOPK more than %dK\n", x_end>>10);
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die("Can not go on");
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}
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#else
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static struct pg_table pgtbl[CONFIG_MAX_CPUS] __attribute__ ((aligned(4096)));
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#endif
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static unsigned long mapped_window[CONFIG_MAX_CPUS];
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unsigned long index;
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unsigned long window;
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