soc/amd/phoenix/Kconfig: factor out FSP-specific options

Split the SOC_AMD_PHOENIX Kconfig option into SOC_AMD_PHOENIX_BASE that
selects the non-FSP-specific options and SOC_AMD_PHOENIX_FSP that
selects both SOC_AMD_PHOENIX_BASE and the FSP-specific options. This
will help to separate the FSP-specific from the FSP-agnostic code. The
mainboards using this SoC now select SOC_AMD_PHOENIX_FSP instead of
SOC_AMD_PHOENIX.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I5e95fbfd9d16930ba3e6cc497557d61adba5a6fa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79983
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2024-01-15 17:34:37 +01:00
parent 7e0f9edd99
commit 73045b269d
5 changed files with 47 additions and 39 deletions

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@ -17,7 +17,7 @@ config BOARD_AMD_BIRMAN_COMMON
config BOARD_AMD_BIRMAN_PHOENIX
select BOARD_AMD_BIRMAN_COMMON
select SOC_AMD_PHOENIX
select SOC_AMD_PHOENIX_FSP
config BOARD_AMD_BIRMAN_GLINDA
select BOARD_AMD_BIRMAN_COMMON

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@ -14,7 +14,7 @@ config BOARD_SPECIFIC_OPTIONS
select PCIEXP_COMMON_CLOCK
select PCIEXP_L1_SUB_STATE
select SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN
select SOC_AMD_PHOENIX
select SOC_AMD_PHOENIX_FSP
config FMDFILE
default "src/mainboard/amd/mayan/chromeos.fmd" if CHROMEOS

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@ -33,7 +33,7 @@ config BOARD_SPECIFIC_OPTIONS
# TODO (b/290763369): Enable APOB after resolving data_abort in ABL
select SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE
select SOC_AMD_COMMON_BLOCK_USE_ESPI
select SOC_AMD_PHOENIX
select SOC_AMD_PHOENIX_FSP
select SPI_FLASH_EXIT_4_BYTE_ADDR_MODE
select SYSTEM_TYPE_LAPTOP
select TPM_GOOGLE_TI50

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@ -3,7 +3,7 @@
# TODO: Evaluate what can be moved to a common directory
# TODO: Update for Phoenix
config SOC_AMD_PHOENIX
config SOC_AMD_PHOENIX_BASE
bool
select ACPI_SOC_NVS
select ARCH_X86
@ -11,18 +11,13 @@ config SOC_AMD_PHOENIX
select CACHE_MRC_SETTINGS
select DRIVERS_USB_ACPI
select DRIVERS_USB_PCI_XHCI
select FSP_COMPRESS_FSP_M_LZMA if !ASYNC_FILE_LOADING
select FSP_COMPRESS_FSP_M_LZ4 if ASYNC_FILE_LOADING
select FSP_COMPRESS_FSP_S_LZ4
select GENERIC_GPIO_LIB
select HAVE_ACPI_TABLES
select HAVE_CF9_RESET
select HAVE_EM100_SUPPORT
select HAVE_FSP_GOP
select HAVE_SMI_HANDLER
select IDT_IN_EVERY_STAGE
select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_0
select PROVIDES_ROM_SHARING
select PSP_SUPPORTS_EFS2_RELATIVE_ADDR if VBOOT_STARTS_BEFORE_BOOTBLOCK
# TODO: (b/303516266) Re-enable CCP DMA after addressing a stall
@ -77,25 +72,34 @@ config SOC_AMD_PHOENIX
select SOC_AMD_COMMON_BLOCK_UART
select SOC_AMD_COMMON_BLOCK_UCODE
select SOC_AMD_COMMON_BLOCK_XHCI
select SSE2
select USE_DDR5
select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK
select VBOOT_X86_SHA256_ACCELERATION if VBOOT
select X86_AMD_FIXED_MTRRS
select X86_INIT_NEED_1_SIPI
config SOC_AMD_PHOENIX_FSP
bool
select SOC_AMD_PHOENIX_BASE
select FSP_COMPRESS_FSP_M_LZMA if !ASYNC_FILE_LOADING
select FSP_COMPRESS_FSP_M_LZ4 if ASYNC_FILE_LOADING
select FSP_COMPRESS_FSP_S_LZ4
select HAVE_FSP_GOP
select PLATFORM_USES_FSP2_0
select SOC_AMD_COMMON_FSP_CCX_CPPC_HOB
select SOC_AMD_COMMON_FSP_DMI_TABLES
select SOC_AMD_COMMON_FSP_PCI # TODO: Check if this is still correct
select SOC_AMD_COMMON_FSP_PCIE_CLK_REQ
select SOC_AMD_COMMON_FSP_PRELOAD_FSPS
select SSE2
select UDK_2017_BINDING
select USE_DDR5
select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM
select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT
select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE
select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK
select VBOOT_X86_SHA256_ACCELERATION if VBOOT
select X86_AMD_FIXED_MTRRS
select X86_INIT_NEED_1_SIPI
help
AMD Phoenix support
AMD Phoenix support using FSP
if SOC_AMD_PHOENIX
if SOC_AMD_PHOENIX_BASE
config CHIPSET_DEVICETREE
string
@ -183,25 +187,6 @@ config ROMSTAGE_SIZE
help
Sets the size of DRAM allocation for romstage in linker script.
config FSP_M_ADDR
hex
default 0x20E0000
help
Sets the address in DRAM where FSP-M should be loaded. cbfstool
performs relocation of FSP-M to this address.
config FSP_M_SIZE
hex
default 0xC0000
help
Sets the size of DRAM allocation for FSP-M in linker script.
config FSP_TEMP_RAM_SIZE
hex
default 0x40000
help
The amount of coreboot-allocated heap and stack usage by the FSP.
config VERSTAGE_ADDR
hex
depends on VBOOT_SEPARATE_VERSTAGE
@ -452,4 +437,27 @@ config RWB_REGION_ONLY
endif # VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK
endif # SOC_AMD_PHOENIX
endif # SOC_AMD_PHOENIX_BASE
if SOC_AMD_PHOENIX_FSP
config FSP_M_ADDR
hex
default 0x20E0000
help
Sets the address in DRAM where FSP-M should be loaded. cbfstool
performs relocation of FSP-M to this address.
config FSP_M_SIZE
hex
default 0xC0000
help
Sets the size of DRAM allocation for FSP-M in linker script.
config FSP_TEMP_RAM_SIZE
hex
default 0x40000
help
The amount of coreboot-allocated heap and stack usage by the FSP.
endif # SOC_AMD_PHOENIX_FSP

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@ -3,7 +3,7 @@
# TODO: Move as much as possible to common
# TODO: Update for Phoenix
ifeq ($(CONFIG_SOC_AMD_PHOENIX),y)
ifeq ($(CONFIG_SOC_AMD_PHOENIX_BASE),y)
subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
@ -355,4 +355,4 @@ vboot-gscvd-ranges += $(call amdfwread-range-cmd,PSPL2: 0x52)
endif # ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
endif # ifeq ($(CONFIG_VBOOT_GSCVD),y)
endif # ($(CONFIG_SOC_AMD_PHOENIX),y)
endif # ($(CONFIG_SOC_AMD_PHOENIX_BASE),y)