soc: Trivial - drop trailing blank lines at EOF

Change-Id: I1829c77f41cc809b590d00ef5522f368bd5fd814
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6208
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

src/soc/intel/baytrail/baytrail/acpi.h

@@ -27,4 +27,3 @@ void acpi_fill_in_fadt(acpi_fadt_t *fadt);
 unsigned long acpi_madt_irq_overrides(unsigned long current);
 
 #endif /* _BAYTRAIL_ACPI_H_ */
-

src/soc/intel/baytrail/baytrail/pattrs.h

@@ -62,4 +62,3 @@ static inline const struct pattrs *pattrs_get(void)
 
 
 #endif /* _PATTRS_H_ */
-

src/soc/intel/baytrail/baytrail/spi.h

@@ -28,4 +28,3 @@
 # define SRC_CACHE_PREFETCH		(0x2 << 2)
 
 #endif /* _BAYTRAIL_SPI_H_ */
-

src/soc/intel/baytrail/northcluster.c

@@ -154,4 +154,3 @@ static const struct pci_driver nc_driver __pci_driver = {
 	.vendor = PCI_VENDOR_ID_INTEL,
 	.device = SOC_DEVID,
 };
-

src/soc/intel/baytrail/refcode.c

@@ -183,4 +183,3 @@ void baytrail_run_reference_code(void)
 		return;
 	}
 }
-

src/soc/intel/baytrail/romstage/romstage.c

@@ -394,4 +394,3 @@ void ramstage_cache_invalid(struct ramstage_cache *cache)
 	cold_reset();
 #endif
 }
-

src/soc/intel/fsp_baytrail/baytrail/acpi.h

@@ -31,4 +31,3 @@ unsigned long acpi_madt_irq_overrides(unsigned long current);
 void acpi_init_gnvs(global_nvs_t *gnvs);
 
 #endif /* _BAYTRAIL_ACPI_H_ */
-

src/soc/intel/fsp_baytrail/baytrail/pattrs.h

@@ -62,4 +62,3 @@ static inline const struct pattrs *pattrs_get(void)
 
 
 #endif /* _PATTRS_H_ */
-

src/soc/intel/fsp_baytrail/baytrail/spi.h

@@ -65,4 +65,3 @@ struct spi_config {
 int mainboard_get_spi_config(struct spi_config *cfg);
 
 #endif /* _BAYTRAIL_SPI_H_ */
-

src/soc/intel/fsp_baytrail/northcluster.c

@@ -219,4 +219,3 @@ static const struct pci_driver nc_driver __pci_driver = {
 	.vendor = PCI_VENDOR_ID_INTEL,
 	.device = SOC_DEVID,
 };
-

src/soc/intel/fsp_baytrail/raminit.c

@@ -45,4 +45,3 @@ unsigned long get_top_of_ram(void)
 
 	return (unsigned long) tom;
 }
-

src/soc/intel/fsp_baytrail/romstage/pmc.c

@@ -38,4 +38,3 @@ void tco_disable(void)
 	reg |= TCO_TMR_HALT;
 	outl(reg, ACPI_BASE_ADDRESS + TCO1_CNT);
 }
-