tpm2: handle failures more gracefully
When trying to bring up a device with a malfunctioning TPM2 chip, the driver currently gets stuck waiting for SPI flow control, causing bricked devices. This patch puts a 100 ms cap on the waiting time - this should be enough even for a longest NVRAM save operation which could be under way on the TPM device. BRANCH=gru BUG=chrome-os-partner:59807 TEST=with a matching change in depthcharge, now a gru with corrupted SPI TPM comes up to the recovery screen (it was not showing signs of life before this change). Change-Id: I63ef5dde8dddd9afeae91e396c157a1a37d47c80 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/17898 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
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@ -105,12 +105,15 @@ void tpm2_get_info(struct tpm2_info *info)
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/*
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* Each TPM2 SPI transaction starts the same: CS is asserted, the 4 byte
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* header is sent to the TPM, the master waits til TPM is ready to continue.
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*
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* Returns 1 on success, 0 on failure (TPM SPI flow control timeout.)
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*/
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static void start_transaction(int read_write, size_t bytes, unsigned addr)
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static int start_transaction(int read_write, size_t bytes, unsigned addr)
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{
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spi_frame_header header;
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uint8_t byte;
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int i;
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struct stopwatch sw;
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/*
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* Give it 10 ms. TODO(vbendeb): remove this once cr50 SPS TPM driver
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@ -159,10 +162,20 @@ static void start_transaction(int read_write, size_t bytes, unsigned addr)
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*/
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tpm_if.xfer(&tpm_if.slave, header.body, sizeof(header.body), NULL, 0);
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/* Now poll the bus until TPM removes the stall bit. */
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/*
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* Now poll the bus until TPM removes the stall bit. Give it up to 100
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* ms to sort it out - it could be saving stuff in nvram at some
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* point.
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*/
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stopwatch_init_msecs_expire(&sw, 100);
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do {
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if (stopwatch_expired(&sw)) {
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printk(BIOS_ERR, "TPM flow control failure\n");
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return 0;
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}
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tpm_if.xfer(&tpm_if.slave, NULL, 0, &byte, 1);
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} while (!(byte & 1));
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return 1;
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}
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/*
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@ -243,13 +256,13 @@ static void read_bytes(void *buffer, size_t bytes)
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* To write a register, start transaction, transfer data to the TPM, deassert
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* CS when done.
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*
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* Returns one to indicate success, zero (not yet implemented) to indicate
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* failure.
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* Returns one to indicate success, zero to indicate failure.
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*/
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static int tpm2_write_reg(unsigned reg_number, const void *buffer, size_t bytes)
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{
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trace_dump("W", reg_number, bytes, buffer, 0);
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start_transaction(false, bytes, reg_number);
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if (!start_transaction(false, bytes, reg_number))
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return 0;
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write_bytes(buffer, bytes);
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tpm_if.cs_deassert(&tpm_if.slave);
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return 1;
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@ -259,12 +272,14 @@ static int tpm2_write_reg(unsigned reg_number, const void *buffer, size_t bytes)
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* To read a register, start transaction, transfer data from the TPM, deassert
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* CS when done.
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*
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* Returns one to indicate success, zero (not yet implemented) to indicate
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* failure.
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* Returns one to indicate success, zero to indicate failure.
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*/
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static int tpm2_read_reg(unsigned reg_number, void *buffer, size_t bytes)
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{
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start_transaction(true, bytes, reg_number);
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if (!start_transaction(true, bytes, reg_number)) {
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memset(buffer, 0, bytes);
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return 0;
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}
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read_bytes(buffer, bytes);
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tpm_if.cs_deassert(&tpm_if.slave);
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trace_dump("R", reg_number, bytes, buffer, 0);
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@ -305,7 +320,12 @@ int tpm2_init(struct spi_slave *spi_if)
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memcpy(&tpm_if.slave, spi_if, sizeof(*spi_if));
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tpm2_read_reg(TPM_DID_VID_REG, &did_vid, sizeof(did_vid));
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/*
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* It is enough to check the first register read error status to bail
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* out in case of malfunctioning TPM.
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*/
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if (!tpm2_read_reg(TPM_DID_VID_REG, &did_vid, sizeof(did_vid)))
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return -1;
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/* Try claiming locality zero. */
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tpm2_read_reg(TPM_ACCESS_REG, &cmd, sizeof(cmd));
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@ -485,6 +505,10 @@ size_t tpm2_process_command(const void *tpm2_command, size_t command_size,
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union fifo_transfer_buffer fifo_buffer;
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const int HEADER_SIZE = 6;
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/* Do not try using an uninitialized TPM. */
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if (!tpm_info.vendor_id)
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return 0;
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/* Skip the two byte tag, read the size field. */
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payload_size = read_be32(cmd_body + 2);
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