ARMv7: Remove static CBMEM allocation
The calculations for static allocation are no longer valid. Change-Id: I6740cdcec789abddf78485a0edaf24882ef8c2a5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4569 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: David Hendricks <dhendrix@chromium.org>
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@ -88,10 +88,6 @@ config SYS_SDRAM_BASE
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hex
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default 0x40000000
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config COREBOOT_TABLES_SIZE
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hex
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default 0x4000000
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choice CONSOLE_SERIAL_UART_CHOICES
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prompt "Serial Console UART"
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default CONSOLE_SERIAL_UART3
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@ -90,10 +90,6 @@ config SYS_SDRAM_BASE
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hex
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default 0x20000000
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config COREBOOT_TABLES_SIZE
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hex
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default 0x4000000
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choice CONSOLE_SERIAL_UART_CHOICES
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prompt "Serial Console UART"
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default CONSOLE_SERIAL_UART3
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@ -47,8 +47,3 @@ config CBFS_HEADER_ROM_OFFSET
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config SYS_SDRAM_BASE
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hex
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default 0x40000000
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# FIXME: this can probably be smaller
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config COREBOOT_TABLES_SIZE
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hex
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default 0x800
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@ -428,25 +428,10 @@ static void mainboard_init(device_t dev)
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backlight_en();
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}
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#if !CONFIG_DYNAMIC_CBMEM
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void get_cbmem_table(uint64_t *base, uint64_t *size)
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{
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*size = CONFIG_COREBOOT_TABLES_SIZE;
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*base = CONFIG_SYS_SDRAM_BASE +
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((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) -
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CONFIG_COREBOOT_TABLES_SIZE;
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}
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#endif
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = &mainboard_init;
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#if !CONFIG_DYNAMIC_CBMEM
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/* set up coreboot tables */
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cbmem_initialize();
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#endif
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/* set up dcache and MMU */
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/* FIXME: this should happen via resource allocator */
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exynos5420_config_l2_cache();
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@ -265,25 +265,10 @@ static void mainboard_init(device_t dev)
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// gpio_info();
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}
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#if !CONFIG_DYNAMIC_CBMEM
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void get_cbmem_table(uint64_t *base, uint64_t *size)
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{
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*size = CONFIG_COREBOOT_TABLES_SIZE;
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*base = CONFIG_SYS_SDRAM_BASE +
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((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) -
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CONFIG_COREBOOT_TABLES_SIZE;
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}
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#endif
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = &mainboard_init;
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#if !CONFIG_DYNAMIC_CBMEM
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/* set up coreboot tables */
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cbmem_initialize();
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#endif
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/* set up dcache and MMU */
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/* FIXME: this should happen via resource allocator */
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exynos5250_config_l2_cache();
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