From 7335225600e5031760e4e0f5f20b2b49e4ac6a95 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 28 Sep 2020 21:03:27 +0530 Subject: [PATCH] soc/intel/skylake: Move PMC MMIO offset macro into pmc.h This patch ensures PMC offset 0xfc resides into pmc.h rather defining into p2sb.h. Change-Id: Iae1c38beae15355a077be80112b723b8ad3d0a44 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/45800 Reviewed-by: Tim Wawrzynczak Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/skylake/include/soc/p2sb.h | 2 -- src/soc/intel/skylake/include/soc/pmc.h | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/src/soc/intel/skylake/include/soc/p2sb.h b/src/soc/intel/skylake/include/soc/p2sb.h index 940ea13c96..41654e70da 100644 --- a/src/soc/intel/skylake/include/soc/p2sb.h +++ b/src/soc/intel/skylake/include/soc/p2sb.h @@ -11,6 +11,4 @@ #define PCH_P2SB_EPMASK0 0xB0 -#define PCH_PWRM_ACPI_TMR_CTL 0xFC - #endif /* _SOC_P2SB_H_ */ diff --git a/src/soc/intel/skylake/include/soc/pmc.h b/src/soc/intel/skylake/include/soc/pmc.h index 68d9eb3d27..6d52b9dbc5 100644 --- a/src/soc/intel/skylake/include/soc/pmc.h +++ b/src/soc/intel/skylake/include/soc/pmc.h @@ -77,6 +77,7 @@ #define DSX_EN_LAN_WAKE_PIN (1 << 0) #define PMSYNC_TPR_CFG 0xc4 #define PMSYNC_LOCK (1 << 31) +#define PCH_PWRM_ACPI_TMR_CTL 0xfc #define GPIO_GPE_CFG 0x120 #define GPE0_DWX_MASK 0xf #define GPE0_DW_SHIFT(x) (4*(x))