diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h
index 734074aad6..0854cf3d96 100644
--- a/src/soc/amd/stoneyridge/include/soc/gpio.h
+++ b/src/soc/amd/stoneyridge/include/soc/gpio.h
@@ -20,7 +20,7 @@
 #define GPIO_DEVICE_DESC	"GPIO Controller"
 
 #ifndef __ACPI__
-#include <soc/amd/common/amd_defs.h>
+#include <soc/iomap.h>
 #include <types.h>
 
 #define GPIO_PIN_STS		(1 << 16)
diff --git a/src/soc/amd/common/amd_defs.h b/src/soc/amd/stoneyridge/include/soc/iomap.h
similarity index 80%
rename from src/soc/amd/common/amd_defs.h
rename to src/soc/amd/stoneyridge/include/soc/iomap.h
index e4ce1dba22..d0c3f3e9d4 100644
--- a/src/soc/amd/common/amd_defs.h
+++ b/src/soc/amd/stoneyridge/include/soc/iomap.h
@@ -2,6 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2017 Raptor Engineering, LLC
+ * Copyright 2017 Google Inc.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -13,10 +14,9 @@
  * GNU General Public License for more details.
  */
 
-
-#ifndef __AMD_SB_DEFS_H__
-#define __AMD_SB_DEFS_H__
+#ifndef __SOC_STONEYRIDGE_IOMAP_H__
+#define __SOC_STONEYRIDGE_IOMAP_H__
 
 #define AMD_SB_ACPI_MMIO_ADDR 0xfed80000ul
 
-#endif
+#endif /* __SOC_STONEYRIDGE_IOMAP_H__ */