soc/amd/common/psp_verstage: Add missing post codes on S0i3 resume

We print these out in the normal flow, so lets add them for S0i3 resume
as well.

BUG=b:221231786
TEST=Perform suspend/resume cycle on guybrush and verify we get the new
POST codes.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ia7d607453d58084868cfa50770fd0f370b2ea2bd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62346
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

src/soc/amd/common/psp_verstage/psp_verstage.c

@@ -251,7 +251,11 @@ void Main(void)
 	svc_get_boot_mode(&bootmode);
 	if (bootmode == PSP_BOOT_MODE_S0i3_RESUME) {
 		psp_verstage_s0i3_resume();
+
+		post_code(POSTCODE_UNMAP_FCH_DEVICES);
 		unmap_fch_devices();
+
+		post_code(POSTCODE_LEAVING_VERSTAGE);
 		svc_exit(0);
 	}