mb/facebook/monolith: Enable the 2nd EC UART at 0x2f8

BUG=N/A
TEST=tested on facebook monolith

Change-Id: I36e652e66c66eeb770a5a5d987bb57c7eaa11382
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38749
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Wim Vervoorn 2020-02-05 12:15:39 +01:00 committed by Patrick Georgi
parent e6db9105ec
commit 737b77c4bb
3 changed files with 33 additions and 4 deletions

View File

@ -11,6 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_TPM2
select MAINBOARD_USES_IFD_GBE_REGION
select INTEL_GMA_HAVE_VBT
select SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE
config CBFS_SIZE
hex "CBFS_SIZE"

View File

@ -43,3 +43,28 @@ Device (COM1) {
EndDependentFn ()
})
}
Device (COM2) {
Name (_HID, EISAID ("PNP0501"))
Name (_UID, 2)
Method (_STA, 0, NotSerialized)
{
Return (0x0F)
}
Name (_CRS, ResourceTemplate ()
{
FixedIO (0x02F8, 0x08)
IRQNoFlags () {3}
})
Name (_PRS, ResourceTemplate ()
{
StartDependentFn (0, 0) {
FixedIO (0x02F8, 0x08)
IRQNoFlags () {3}
}
EndDependentFn ()
})
}

View File

@ -19,11 +19,14 @@
#include <device/pnp_ops.h>
#include "onboard.h"
#define SERIAL_DEV PNP_DEV(ITE8528_CMD_PORT, 1) /* ITE8528 UART1 */
#define SERIAL_DEV1 PNP_DEV(ITE8528_CMD_PORT, 1) /* ITE8528 UART1 */
#define SERIAL_DEV2 PNP_DEV(ITE8528_CMD_PORT, 2) /* ITE8528 UART2 */
void bootblock_mainboard_early_init(void)
{
/* Enable the serial port inside the EC */
pnp_set_logical_device(SERIAL_DEV);
pnp_set_enable(SERIAL_DEV, 1);
/* Enable the serial ports inside the EC */
pnp_set_logical_device(SERIAL_DEV1);
pnp_set_enable(SERIAL_DEV1, 1);
pnp_set_logical_device(SERIAL_DEV2);
pnp_set_enable(SERIAL_DEV2, 1);
}