From 738331885680b99fadafba92f1cf3e2a76fd8624 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 26 Mar 2021 18:01:35 +0100 Subject: [PATCH] nb/intel/pineview: Drop MCHBAR macro from DMIBAR access While the macro value is the same, the DMIBAR register is not HTBONUS1. Tested with BUILD_TIMELESS=1, Foxconn D41S remains identical. Change-Id: I5025f115f5a55dc782092989f3d158802d1d9353 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/51858 Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- src/northbridge/intel/pineview/early_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c index ce2398496c..89e3ab78c1 100644 --- a/src/northbridge/intel/pineview/early_init.c +++ b/src/northbridge/intel/pineview/early_init.c @@ -99,7 +99,7 @@ static void early_misc_setup(void) { MCHBAR32(HIT0); MCHBAR32(HIT0) = 0x00021800; - DMIBAR32(HTBONUS1) = 0x86000040; + DMIBAR32(0x2c) = 0x86000040; pci_write_config32(PCI_DEV(0, 0x1e, 0), 0x18, 0x00020200); pci_write_config32(PCI_DEV(0, 0x1e, 0), 0x18, 0x00000000);