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mb/google/hatch/: FPMCU not rebooted when DUT reboots 

Add FP_RST_ODL to early GPIO table, configured as low, so that the FPMCU
will get reset when coreboot enters bootblock.

BUG=b:130229952
BRANCH=none
TEST=Compiles (no Hatch device w/FP to test)

Change-Id: I8a8d8cc2c560f6518337f7500575fdc2265b6347
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32419
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
This commit is contained in:
Tim Wawrzynczak 2019-04-23 09:42:43 -06:00 committed by Patrick Georgi
parent 478a1212ef
commit 7391fd8084
1 changed files with 2 additions and 0 deletions
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2
src/mainboard/google/hatch/variants/baseboard/gpio.c
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@ -441,6 +441,8 @@ const struct pad_config *__weak variant_sleep_gpio_table(
/* GPIOs needed prior to ramstage. */ /* GPIOs needed prior to ramstage. */
static const struct pad_config early_gpio_table[] = { static const struct pad_config early_gpio_table[] = {
/* A12 : FPMCU_RST_ODL */
PAD_CFG_GPO(GPP_A12, 0, DEEP),
/* B15 : H1_SLAVE_SPI_CS_L */ /* B15 : H1_SLAVE_SPI_CS_L */
PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1), PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1),
/* B16 : H1_SLAVE_SPI_CLK */ /* B16 : H1_SLAVE_SPI_CLK */