soc/intel: Fix typo in comment
rotine ---> routine Change-Id: I21a71f52d2ec7a05ea3dadf30e8f3e8dac07d168 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52106 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
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@ -5,7 +5,7 @@
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/*
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* Routine to perform below operations:
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* 1. SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register
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* 1. SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register
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* 2. Program GPIO PM configuration based on PM mask and value
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*/
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void soc_gpio_pm_configuration(void)
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@ -98,7 +98,7 @@ const char *soc_acpi_name(const struct device *dev)
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}
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#endif
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/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */
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/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
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static void soc_fill_gpio_pm_configuration(void)
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{
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uint8_t value[TOTAL_GPIO_COMM];
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@ -88,7 +88,7 @@ const char *soc_acpi_name(const struct device *dev)
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}
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#endif
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/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */
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/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
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static void soc_fill_gpio_pm_configuration(void)
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{
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uint8_t value[TOTAL_GPIO_COMM];
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@ -104,7 +104,7 @@ const char *soc_acpi_name(const struct device *dev)
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}
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#endif
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/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */
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/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
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static void soc_fill_gpio_pm_configuration(void)
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{
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uint8_t value[TOTAL_GPIO_COMM];
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@ -109,7 +109,7 @@ const char *soc_acpi_name(const struct device *dev)
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}
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#endif
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/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */
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/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
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static void soc_fill_gpio_pm_configuration(void)
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{
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uint8_t value[TOTAL_GPIO_COMM];
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