cpu/intel: Add int to unsigned
Fix the following warning detected by checkpatch.pl: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' TEST=Build and run on Galileo Gen2 Change-Id: I207713a3370e5a9abed4535187aa2aaeef502d6f Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18848 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
parent
4239ff37b7
commit
73a2894203
|
@ -25,7 +25,7 @@
|
|||
* Document Number 504790
|
||||
* Revision 1.6.0, June 2012 */
|
||||
|
||||
static void msr_set_bit(unsigned reg, unsigned bit)
|
||||
static void msr_set_bit(unsigned int reg, unsigned int bit)
|
||||
{
|
||||
msr_t msr = rdmsr(reg);
|
||||
|
||||
|
|
|
@ -113,8 +113,8 @@ void set_power_limits(u8 power_limit_1_time)
|
|||
{
|
||||
msr_t msr = rdmsr(MSR_PLATFORM_INFO);
|
||||
msr_t limit;
|
||||
unsigned power_unit;
|
||||
unsigned tdp, min_power, max_power, max_time;
|
||||
unsigned int power_unit;
|
||||
unsigned int tdp, min_power, max_power, max_time;
|
||||
u8 power_limit_1_val;
|
||||
|
||||
if (power_limit_1_time >= ARRAY_SIZE(power_limit_time_sec_to_msr))
|
||||
|
@ -251,7 +251,7 @@ static void configure_mca(void)
|
|||
int cpu_get_apic_id_map(int *apic_id_map)
|
||||
{
|
||||
struct cpuid_result result;
|
||||
unsigned threads_per_package, threads_per_core, i, shift = 0;
|
||||
unsigned int threads_per_package, threads_per_core, i, shift = 0;
|
||||
|
||||
/* Logical processors (threads) per core */
|
||||
result = cpuid_ext(0xb, 0);
|
||||
|
@ -276,7 +276,7 @@ int cpu_get_apic_id_map(int *apic_id_map)
|
|||
static void intel_cores_init(struct device *cpu)
|
||||
{
|
||||
struct cpuid_result result;
|
||||
unsigned threads_per_package, threads_per_core, i;
|
||||
unsigned int threads_per_package, threads_per_core, i;
|
||||
|
||||
/* Logical processors (threads) per core */
|
||||
result = cpuid_ext(0xb, 0);
|
||||
|
|
|
@ -75,7 +75,7 @@ static void configure_mca(void)
|
|||
static void intel_cores_init(struct device *cpu)
|
||||
{
|
||||
struct cpuid_result result;
|
||||
unsigned threads_per_package, threads_per_core, i;
|
||||
unsigned int threads_per_package, threads_per_core, i;
|
||||
|
||||
/* Logical processors (threads) per core */
|
||||
result = cpuid_ext(0xb, 0);
|
||||
|
|
|
@ -31,8 +31,8 @@
|
|||
#error "CPU must be paired with Intel LynxPoint southbridge"
|
||||
#endif
|
||||
|
||||
static void set_var_mtrr(
|
||||
unsigned reg, unsigned base, unsigned size, unsigned type)
|
||||
static void set_var_mtrr(unsigned int reg, unsigned int base, unsigned int size,
|
||||
unsigned int type)
|
||||
|
||||
{
|
||||
/* Bit Bit 32-35 of MTRRphysMask should be set to 1 */
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
* Revision 1.6.0, June 2012 */
|
||||
|
||||
#if 0
|
||||
static void msr_set_bit(unsigned reg, unsigned bit)
|
||||
static void msr_set_bit(unsigned int reg, unsigned int bit)
|
||||
{
|
||||
msr_t msr = rdmsr(reg);
|
||||
|
||||
|
|
|
@ -414,8 +414,8 @@ void set_power_limits(u8 power_limit_1_time)
|
|||
{
|
||||
msr_t msr = rdmsr(MSR_PLATFORM_INFO);
|
||||
msr_t limit;
|
||||
unsigned power_unit;
|
||||
unsigned tdp, min_power, max_power, max_time;
|
||||
unsigned int power_unit;
|
||||
unsigned int tdp, min_power, max_power, max_time;
|
||||
u8 power_limit_1_val;
|
||||
|
||||
if (power_limit_1_time >= ARRAY_SIZE(power_limit_time_sec_to_msr))
|
||||
|
|
|
@ -53,7 +53,7 @@ int intel_ht_sibling(void)
|
|||
|
||||
void intel_sibling_init(struct device *cpu)
|
||||
{
|
||||
unsigned i, siblings;
|
||||
unsigned int i, siblings;
|
||||
struct cpuid_result result;
|
||||
|
||||
/* On the bootstrap processor see if I want sibling cpus enabled */
|
||||
|
|
|
@ -30,8 +30,8 @@
|
|||
#error "CPU must be paired with Intel Ibex Peak southbridge"
|
||||
#endif
|
||||
|
||||
static void set_var_mtrr(
|
||||
unsigned reg, unsigned base, unsigned size, unsigned type)
|
||||
static void set_var_mtrr(unsigned int reg, unsigned int base, unsigned int size,
|
||||
unsigned int type)
|
||||
|
||||
{
|
||||
/* Bit Bit 32-35 of MTRRphysMask should be set to 1 */
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
* Document Number 504790
|
||||
* Revision 1.6.0, June 2012 */
|
||||
|
||||
static void msr_set_bit(unsigned reg, unsigned bit)
|
||||
static void msr_set_bit(unsigned int reg, unsigned int bit)
|
||||
{
|
||||
msr_t msr = rdmsr(reg);
|
||||
|
||||
|
|
|
@ -115,7 +115,7 @@ int cpu_get_apic_id_map(int *apic_id_map)
|
|||
{
|
||||
int i;
|
||||
struct cpuid_result result;
|
||||
unsigned threads_per_package, threads_per_core;
|
||||
unsigned int threads_per_package, threads_per_core;
|
||||
|
||||
/* Logical processors (threads) per core */
|
||||
result = cpuid_ext(0xb, 0);
|
||||
|
@ -258,7 +258,7 @@ static void configure_mca(void)
|
|||
static void intel_cores_init(struct device *cpu)
|
||||
{
|
||||
struct cpuid_result result;
|
||||
unsigned threads_per_package, threads_per_core, i;
|
||||
unsigned int threads_per_package, threads_per_core, i;
|
||||
|
||||
/* Logical processors (threads) per core */
|
||||
result = cpuid_ext(0xb, 0);
|
||||
|
|
|
@ -31,8 +31,8 @@
|
|||
#error "CPU must be paired with Intel BD82X6X or C216 southbridge"
|
||||
#endif
|
||||
|
||||
static void set_var_mtrr(
|
||||
unsigned reg, unsigned base, unsigned size, unsigned type)
|
||||
static void set_var_mtrr(unsigned int reg, unsigned int base, unsigned int size,
|
||||
unsigned int type)
|
||||
|
||||
{
|
||||
/* Bit Bit 32-35 of MTRRphysMask should be set to 1 */
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
* Document Number 504790
|
||||
* Revision 1.6.0, June 2012 */
|
||||
|
||||
static void msr_set_bit(unsigned reg, unsigned bit)
|
||||
static void msr_set_bit(unsigned int reg, unsigned int bit)
|
||||
{
|
||||
msr_t msr = rdmsr(reg);
|
||||
|
||||
|
|
|
@ -190,8 +190,8 @@ void set_power_limits(u8 power_limit_1_time)
|
|||
{
|
||||
msr_t msr = rdmsr(MSR_PLATFORM_INFO);
|
||||
msr_t limit;
|
||||
unsigned power_unit;
|
||||
unsigned tdp, min_power, max_power, max_time;
|
||||
unsigned int power_unit;
|
||||
unsigned int tdp, min_power, max_power, max_time;
|
||||
u8 power_limit_1_val;
|
||||
|
||||
if (power_limit_1_time >= ARRAY_SIZE(power_limit_time_sec_to_msr))
|
||||
|
@ -424,7 +424,7 @@ static void configure_mca(void)
|
|||
int cpu_get_apic_id_map(int *apic_id_map)
|
||||
{
|
||||
struct cpuid_result result;
|
||||
unsigned threads_per_package, threads_per_core, i, shift = 0;
|
||||
unsigned int threads_per_package, threads_per_core, i, shift = 0;
|
||||
|
||||
/* Logical processors (threads) per core */
|
||||
result = cpuid_ext(0xb, 0);
|
||||
|
@ -449,7 +449,7 @@ int cpu_get_apic_id_map(int *apic_id_map)
|
|||
static void intel_cores_init(struct device *cpu)
|
||||
{
|
||||
struct cpuid_result result;
|
||||
unsigned threads_per_package, threads_per_core, i;
|
||||
unsigned int threads_per_package, threads_per_core, i;
|
||||
|
||||
/* Logical processors (threads) per core */
|
||||
result = cpuid_ext(0xb, 0);
|
||||
|
|
Loading…
Reference in New Issue