There are more than a dozen targets in the v2 tree which refer to ROMCC
in their Config.lb but never use it. There's no point in keeping dead code around. Kill it. This patch removes ROMCC remainders from Config.lb for tyan/s2735 and tyan/s2850. Abuild build log with and without the patch is completely identical. More patches of the same type can be done, hopefully making ROMCC dependencies a bit more clear for v2. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4048 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Carl-Daniel Hailfinger
parent
e729846b64
commit
73ad326452
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@ -35,7 +35,6 @@ default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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arch i386 end
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##
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## Build the objects we have code for in this directory.
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##
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@ -44,8 +43,6 @@ driver mainboard.o
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if HAVE_MP_TABLE object mptable.o end
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if HAVE_PIRQ_TABLE object irq_tables.o end
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object reset.o
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if USE_DCACHE_RAM
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if CONFIG_USE_INIT
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makerule ./auto.o
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@ -62,31 +59,6 @@ makerule ./auto.inc
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action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
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end
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end
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else
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##
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## Romcc output
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##
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makerule ./failover.E
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depends "$(MAINBOARD)/failover.c ../romcc"
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action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
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end
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makerule ./failover.inc
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depends "$(MAINBOARD)/failover.c ../romcc"
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action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
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end
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makerule ./auto.E
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depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
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action "../romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
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end
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makerule ./auto.inc
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depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
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action "../romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
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end
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end
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##
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@ -95,7 +67,6 @@ end
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mainboardinit cpu/x86/16bit/entry16.inc
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mainboardinit cpu/x86/32bit/entry32.inc
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ldscript /cpu/x86/16bit/entry16.lds
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if USE_DCACHE_RAM
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if CONFIG_USE_INIT
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ldscript /cpu/x86/32bit/entry32.lds
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end
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@ -103,7 +74,6 @@ if USE_DCACHE_RAM
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if CONFIG_USE_INIT
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ldscript /cpu/x86/car/cache_as_ram.lds
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end
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end
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##
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@ -117,24 +87,16 @@ else
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ldscript /cpu/x86/32bit/reset32.lds
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end
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if USE_DCACHE_RAM
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else
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### Should this be in the northbridge code?
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mainboardinit arch/i386/lib/cpu_reset.inc
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end
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##
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## Include an id string (For safe flashing)
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##
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mainboardinit arch/i386/lib/id.inc
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ldscript /arch/i386/lib/id.lds
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if USE_DCACHE_RAM
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##
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## Setup Cache-As-Ram
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##
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mainboardinit cpu/x86/car/cache_as_ram.inc
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end
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###
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### This is the early phase of coreboot startup
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@ -142,36 +104,18 @@ end
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### failover to another image.
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###
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if USE_FALLBACK_IMAGE
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if USE_DCACHE_RAM
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ldscript /arch/i386/lib/failover.lds
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else
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ldscript /arch/i386/lib/failover.lds
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mainboardinit ./failover.inc
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end
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end
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##
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## Setup RAM
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##
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if USE_DCACHE_RAM
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if CONFIG_USE_INIT
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initobject auto.o
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else
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mainboardinit ./auto.inc
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end
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else
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# ROMCC
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mainboardinit cpu/x86/fpu/enable_fpu.inc
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mainboardinit cpu/x86/mmx/enable_mmx.inc
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mainboardinit cpu/x86/sse/enable_sse.inc
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mainboardinit ./auto.inc
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mainboardinit cpu/x86/sse/disable_sse.inc
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mainboardinit cpu/x86/mmx/disable_mmx.inc
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end
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##
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## Include the secondary Configuration files
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##
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@ -45,8 +45,6 @@ driver mainboard.o
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if HAVE_MP_TABLE object mptable.o end
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if HAVE_PIRQ_TABLE object irq_tables.o end
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if USE_DCACHE_RAM
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if CONFIG_USE_INIT
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makerule ./auto.o
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@ -63,31 +61,6 @@ makerule ./auto.inc
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action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
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end
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end
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else
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##
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## Romcc output
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##
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makerule ./failover.E
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depends "$(MAINBOARD)/failover.c ../romcc"
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action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
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end
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makerule ./failover.inc
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depends "$(MAINBOARD)/failover.c ../romcc"
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action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
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end
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makerule ./auto.E
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depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
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action "../romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
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end
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makerule ./auto.inc
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depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
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action "../romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
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end
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end
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##
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## Build our 16 bit and 32 bit coreboot entry code
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@ -99,7 +72,6 @@ end
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mainboardinit cpu/x86/32bit/entry32.inc
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if USE_DCACHE_RAM
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if CONFIG_USE_INIT
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ldscript /cpu/x86/32bit/entry32.lds
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end
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@ -107,7 +79,6 @@ if USE_DCACHE_RAM
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if CONFIG_USE_INIT
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ldscript /cpu/amd/car/cache_as_ram.lds
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end
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end
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##
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## Build our reset vector (This is where coreboot is entered)
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@ -120,24 +91,16 @@ else
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ldscript /cpu/x86/32bit/reset32.lds
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end
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if USE_DCACHE_RAM
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else
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### Should this be in the northbridge code?
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mainboardinit arch/i386/lib/cpu_reset.inc
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end
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##
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## Include an id string (For safe flashing)
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##
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mainboardinit arch/i386/lib/id.inc
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ldscript /arch/i386/lib/id.lds
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if USE_DCACHE_RAM
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##
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## Setup Cache-As-Ram
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##
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mainboardinit cpu/amd/car/cache_as_ram.inc
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end
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###
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### This is the early phase of coreboot startup
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@ -145,12 +108,7 @@ end
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### failover to another image.
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###
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if USE_FALLBACK_IMAGE
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if USE_DCACHE_RAM
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ldscript /arch/i386/lib/failover.lds
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else
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ldscript /arch/i386/lib/failover.lds
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mainboardinit ./failover.inc
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end
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end
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###
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@ -160,28 +118,12 @@ end
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##
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## Setup RAM
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##
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if USE_DCACHE_RAM
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if CONFIG_USE_INIT
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initobject auto.o
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else
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mainboardinit ./auto.inc
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end
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else
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##
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## Setup RAM
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##
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mainboardinit cpu/x86/fpu/enable_fpu.inc
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mainboardinit cpu/x86/mmx/enable_mmx.inc
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mainboardinit cpu/x86/sse/enable_sse.inc
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mainboardinit ./auto.inc
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mainboardinit cpu/x86/sse/disable_sse.inc
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mainboardinit cpu/x86/mmx/disable_mmx.inc
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end
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##
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## Include the secondary Configuration files
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##
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