GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Persimmon: Disable the unused GPP PCIe clocks 

Change-Id: I4128af7912bec090bbd48acc1b20d0452e7a4a28
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/1876
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Zheng Bao <zheng.bao@amd.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
This commit is contained in:
Dave Frodin 2012-11-16 14:16:33 -07:00 committed by Marc Jones
parent 8ada1526df
commit 73be43a139
1 changed files with 10 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/mainboard/amd/persimmon/mainboard.c
View File

@ -28,6 +28,7 @@
#include "BiosCallOuts.h" #include "BiosCallOuts.h"
#include <cpu/amd/agesa/s3_resume.h> #include <cpu/amd/agesa/s3_resume.h>
#include <cpu/amd/mtrr.h> #include <cpu/amd/mtrr.h>
#include "SBPLATFORM.h"
void set_pcie_reset(void); void set_pcie_reset(void);
void set_pcie_dereset(void); void set_pcie_dereset(void);
@ -63,6 +64,15 @@ static void persimmon_enable(device_t dev)
#if CONFIG_HAVE_ACPI_RESUME #if CONFIG_HAVE_ACPI_RESUME
acpi_slp_type = acpi_get_sleep_type(); acpi_slp_type = acpi_get_sleep_type();
#endif #endif
/* enable GPP CLK0 thru CLK1 */
/* disable GPP CLK2 thru SLT_GFX_CLK */
u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
*(misc_mem_clk_cntrl + 0) = 0xFF;
*(misc_mem_clk_cntrl + 1) = 0x00;
*(misc_mem_clk_cntrl + 2) = 0x00;
*(misc_mem_clk_cntrl + 3) = 0x00;
*(misc_mem_clk_cntrl + 4) = 0x00;
} }
struct chip_operations mainboard_ops = { struct chip_operations mainboard_ops = {