soc/amd: Implement common reset API
Add an `amdblocks` internal API and rename soft_reset() => warm_reset() hard_reset() => cold_reset() as these terms are commonly used in the surrounding code. On Stoney Ridge, make board_reset() call cold_reset() to keep current behaviour of common code calling hard_reset(). But add a TODO if this is intended. Note: Stoney Ridge is using CF9 for the actual reset but the configuration for a cold reset doesn't use the usual full reset bit but some other mechanism. Change-Id: Id33eda676d79529db759b85fa8e28386846e6fa4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29053 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
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@ -0,0 +1,42 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2017 Google, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __AMD_RESET_H__
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#define __AMD_RESET_H__
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#include <console/console.h>
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#include <arch/cache.h>
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#include <halt.h>
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void do_warm_reset(void);
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void do_cold_reset(void);
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static inline __noreturn void warm_reset(void)
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{
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printk(BIOS_INFO, "%s() called!\n", __func__);
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dcache_clean_all();
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do_warm_reset();
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halt();
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}
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static inline __noreturn void cold_reset(void)
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{
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printk(BIOS_INFO, "%s() called!\n", __func__);
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dcache_clean_all();
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do_cold_reset();
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halt();
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}
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#endif /* __AMD_RESET_H__ */
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@ -21,7 +21,7 @@
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#include <amdblocks/BiosCallOuts.h>
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#include <amdblocks/BiosCallOuts.h>
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#include <amdblocks/agesawrapper.h>
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#include <amdblocks/agesawrapper.h>
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#include <amdblocks/agesawrapper_call.h>
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#include <amdblocks/agesawrapper_call.h>
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#include <reset.h>
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#include <amdblocks/reset.h>
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#include <soc/southbridge.h>
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#include <soc/southbridge.h>
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#if ENV_BOOTBLOCK
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#if ENV_BOOTBLOCK
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@ -127,12 +127,12 @@ AGESA_STATUS agesa_Reset(UINT32 Func, UINTN Data, VOID *ConfigPtr)
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switch (ResetType) {
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switch (ResetType) {
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case WARM_RESET_WHENEVER:
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case WARM_RESET_WHENEVER:
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case WARM_RESET_IMMEDIATELY:
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case WARM_RESET_IMMEDIATELY:
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do_soft_reset();
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warm_reset();
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break;
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break;
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case COLD_RESET_WHENEVER:
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case COLD_RESET_WHENEVER:
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case COLD_RESET_IMMEDIATELY:
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case COLD_RESET_IMMEDIATELY:
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do_hard_reset();
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cold_reset();
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break;
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break;
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default:
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default:
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@ -39,7 +39,6 @@ config CPU_SPECIFIC_OPTIONS
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select GENERIC_UDELAY
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select GENERIC_UDELAY
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select IOAPIC
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select IOAPIC
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_HARD_RESET
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select HAVE_MONOTONIC_TIMER
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select HAVE_MONOTONIC_TIMER
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select SPI_FLASH if HAVE_ACPI_RESUME
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select SPI_FLASH if HAVE_ACPI_RESUME
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select TSC_SYNC_LFENCE
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select TSC_SYNC_LFENCE
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@ -20,6 +20,7 @@
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#include <soc/pci_devs.h>
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#include <soc/pci_devs.h>
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#include <device/pci_ops.h>
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#include <device/pci_ops.h>
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#include <soc/southbridge.h>
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#include <soc/southbridge.h>
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#include <amdblocks/reset.h>
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void set_warm_reset_flag(void)
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void set_warm_reset_flag(void)
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{
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{
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@ -45,7 +46,7 @@ static void clear_bios_reset(void)
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pci_write_config32(SOC_HT_DEV, HT_INIT_CONTROL, htic);
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pci_write_config32(SOC_HT_DEV, HT_INIT_CONTROL, htic);
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}
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}
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void do_hard_reset(void)
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void do_cold_reset(void)
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{
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{
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clear_bios_reset();
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clear_bios_reset();
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@ -55,7 +56,7 @@ void do_hard_reset(void)
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outb(RST_CMD | SYS_RST, SYS_RESET);
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outb(RST_CMD | SYS_RST, SYS_RESET);
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}
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}
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void do_soft_reset(void)
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void do_warm_reset(void)
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{
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{
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set_warm_reset_flag();
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set_warm_reset_flag();
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clear_bios_reset();
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clear_bios_reset();
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@ -63,3 +64,9 @@ void do_soft_reset(void)
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/* Assert reset signals only. */
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/* Assert reset signals only. */
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outb(RST_CMD | SYS_RST, SYS_RESET);
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outb(RST_CMD | SYS_RST, SYS_RESET);
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}
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}
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void do_board_reset(void)
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{
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/* TODO: Would a warm_reset() suffice? */
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do_cold_reset();
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}
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@ -26,6 +26,7 @@
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#include <elog.h>
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#include <elog.h>
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#include <amdblocks/amd_pci_util.h>
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#include <amdblocks/amd_pci_util.h>
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#include <amdblocks/agesawrapper.h>
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#include <amdblocks/agesawrapper.h>
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#include <amdblocks/reset.h>
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#include <soc/southbridge.h>
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#include <soc/southbridge.h>
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#include <soc/smi.h>
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#include <soc/smi.h>
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#include <soc/amd_pci_int_defs.h>
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#include <soc/amd_pci_int_defs.h>
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@ -33,7 +34,6 @@
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#include <soc/pci_devs.h>
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#include <soc/pci_devs.h>
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#include <agesa_headers.h>
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#include <agesa_headers.h>
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#include <soc/nvs.h>
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#include <soc/nvs.h>
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#include <reset.h>
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/*
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/*
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* Table of devices that need their AOAC registers enabled and waited
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* Table of devices that need their AOAC registers enabled and waited
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@ -639,7 +639,7 @@ void bootblock_fch_early_init(void)
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setup_misc(&reboot);
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setup_misc(&reboot);
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if (reboot)
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if (reboot)
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soft_reset();
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warm_reset();
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sb_enable_legacy_io();
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sb_enable_legacy_io();
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enable_aoac_devices();
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enable_aoac_devices();
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