mb/google/delbin: Configure DP_HPD as PAD_NC and disable DdiPortHpd

GPP_A19(DP_HPD1) and GPP_A20(DP_HPD2) were configured native function
(NF1) without internal pull-down which wrongly presents HPD interrupts.
DP_HPD had been removed for EVT design as those events are through eSPI.
This change configures GPP_A19 and GPP_A20 to be no connection and
disables DdiPort1Hpd and DdiPort2Hpd.

BUG=b:162566436
TEST=Booted to kernel and verified no kernel HPD pins assertion message
on Delbin board.

Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Change-Id: Ifdef8ee438276678258b75d2fb70c6dfc7ee0a33
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
This commit is contained in:
Ravi Sarawadi 2020-09-02 07:03:47 -07:00 committed by Patrick Georgi
parent 47c4bf5571
commit 73cd3e704f
2 changed files with 5 additions and 2 deletions

View File

@ -19,9 +19,9 @@ static const struct pad_config override_gpio_table[] = {
/* A18 : DDSP_HPDB ==> HDMI_HPD */
PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
/* A19 : DDSP_HPD1 ==> USB_C0_DP_HPD */
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1),
PAD_NC(GPP_A19, NONE),
/* A20 : DDSP_HPD2 ==> USB_C1_DP_HPD */
PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1),
PAD_NC(GPP_A20, NONE),
/* A22 : DDPC_CTRLDATA ==> EN_HDMI_PWR */
PAD_CFG_GPO(GPP_A22, 1, DEEP),
/* A23 : I2S1_SCLK ==> I2S1_SPKR_SCLK */

View File

@ -1,4 +1,7 @@
chip soc/intel/tigerlake
register "DdiPort1Hpd" = "0"
register "DdiPort2Hpd" = "0"
device domain 0 on
device pci 15.0 on
chip drivers/i2c/generic