drivers/soundwire/alc5682: Support Realtek ALC5682 SoundWire device
The ALC5682 headset codec can be connected over SoundWire and be
configured for mainboards to use:
- Data Port 0 and Bulk Register Access is supported
- Data Ports 1-4 are supported as both source and sink
The data port and audio mode properties are filled out as best as
possible with the datasheet as a reference.
The ACPI address for the codec is calculated with the information in
the codec driver combined with the devicetree.cb hierarchy where the
link and unique IDs are extracted from the device path.
For example this device is connected to master link ID 0 and has strap
settings configuring it for unique ID 1:
chip drivers/soundwire/alc5682
register "desc" = ""Headset Codec""
device generic 0.1 on end
end
This driver was tested with the volteer reference design by booting
and disassembling the runtime SSDT to ensure that the devices have the
expected address and properties.
Device (SW01)
{
Name (_ADR, 0x000021025D568200)
Name (_DDN, "Headset Codec")
Name (_DSD, Package ()
{
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () { "mipi-sdw-sw-interface-revision", 0x00010000 },
[...]
},
ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
Package () {
Package () { "mipi-sdw-port-bra-mode-0", "BRA0" },
Package () { "mipi-sdw-dp-0-subproperties", "DP0" },
Package () { "mipi-sdw-port-audio-mode-0", "MOD0" },
Package () { "mipi-sdw-dp-1-source-subproperties", "SRC1" },
Package () { "mipi-sdw-dp-1-sink-subproperties", "SNK1" },
[...]
}
}
Name (BRA0, Package ()
{
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () {
"mipi-sdw-bra-mode-bus-frequency-configs",
Package () { 0x000F4240, [...] }
},
[...]
}
}
Name (DP0, Package ()
{
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () { "mipi-sdw-bra-flow-controlled", Zero },
[...]
},
ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
Package () {
Package () { "mipi-sdw-port-bra-mode-0", "BRA0" }
}
}
Name (MOD0, Package ()
{
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () {
"mipi-sdw-audio-mode-bus-frequency-configs",
Package () { 0x000F4240, [...] }
},
[...]
}
}
Name (SNK1, Package ()
{
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () { "mipi-sdw-data-port-type", Zero },
[...]
},
ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
Package () {
Package () { "mipi-sdw-port-audio-mode-0", "MOD0" }
}
}
Name (SNK1, Package ()
{
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
Package () {
Package () { "mipi-sdw-data-port-type", Zero },
[...]
},
ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
Package () {
Package () { "mipi-sdw-port-audio-mode-0", "MOD0" }
}
}
}
BUG=b:146482091
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: I488dcd81d2e66a6f2c269ab7fa9f7ceaf2cbf003
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40891
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Duncan Laurie
Duncan Laurie
parent
e0563cc16e
commit
73ce9fb18a
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@ -0,0 +1,2 @@
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config DRIVERS_SOUNDWIRE_ALC5682
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bool
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@ -0,0 +1 @@
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ramstage-$(CONFIG_DRIVERS_SOUNDWIRE_ALC5682) += alc5682.c
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@ -0,0 +1,179 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpigen.h>
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#include <acpi/acpi_device.h>
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#include <acpi/acpi_soundwire.h>
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#include <device/device.h>
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#include <device/mipi_ids.h>
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#include <device/path.h>
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#include <device/soundwire.h>
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#include <stdio.h>
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#include "chip.h"
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static struct soundwire_address alc5682_address = {
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.version = SOUNDWIRE_VERSION_1_1,
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.manufacturer_id = MIPI_MFG_ID_REALTEK,
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.part_id = MIPI_DEV_ID_REALTEK_ALC5682,
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.class = MIPI_CLASS_NONE
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};
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static struct soundwire_slave alc5682_slave = {
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.wake_up_unavailable = false,
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.test_mode_supported = false,
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.clock_stop_mode1_supported = true,
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.simplified_clockstopprepare_sm_supported = true,
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.clockstopprepare_hard_reset_behavior = false,
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.highPHY_capable = false,
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.paging_supported = false,
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.bank_delay_supported = false,
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.port15_read_behavior = false,
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.source_port_list = SOUNDWIRE_PORT(1) | SOUNDWIRE_PORT(2) |
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SOUNDWIRE_PORT(3) | SOUNDWIRE_PORT(4),
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.sink_port_list = SOUNDWIRE_PORT(1) | SOUNDWIRE_PORT(2) |
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SOUNDWIRE_PORT(3) | SOUNDWIRE_PORT(4)
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};
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static struct soundwire_bra_mode alc5682_dp0_bra_mode = {
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.bus_frequency_configs_count = 7,
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.bus_frequency_configs = {
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1000 * KHz, /* 1 MHz */
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2400 * KHz, /* 2.4 MHz */
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3000 * KHz, /* 3 MHz */
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4000 * KHz, /* 4 MHz */
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4800 * KHz, /* 4.8 MHz */
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9600 * KHz, /* 9.6 MHz */
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12000 * KHz, /* 12 MHz */
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},
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.max_data_per_frame = 470,
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.min_us_between_transactions = 0
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};
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static struct soundwire_dp0 alc5682_dp0 = {
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.port_max_wordlength = 64,
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.port_min_wordlength = 1,
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.bra_imp_def_response_supported = false,
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.simplified_channel_prepare_sm = true,
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.imp_def_dp0_interrupts_supported = 0,
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.imp_def_bpt_supported = true,
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.bra_mode_count = 1,
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.bra_mode_list = { 0 }
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};
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static struct soundwire_audio_mode alc5682_audio_mode = {
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.bus_frequency_configs_count = 7,
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.bus_frequency_configs = {
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1000 * KHz, /* 1 MHz */
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2400 * KHz, /* 2.4 MHz */
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3000 * KHz, /* 3 MHz */
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4000 * KHz, /* 4 MHz */
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4800 * KHz, /* 4.8 MHz */
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9600 * KHz, /* 9.6 MHz */
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12000 * KHz, /* 12 MHz */
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},
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/* Support 8 KHz to 192 KHz sampling frequency */
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.max_sampling_frequency = 192 * KHz,
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.min_sampling_frequency = 8 * KHz,
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.prepare_channel_behavior = CHANNEL_PREPARE_ANY_FREQUENCY
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};
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static struct soundwire_dpn alc5682_dpn = {
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.port_wordlength_configs_count = 3,
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.port_wordlength_configs = { 16, 20, 24 },
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.data_port_type = FULL_DATA_PORT,
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.max_grouping_supported = BLOCK_GROUP_COUNT_1,
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.simplified_channelprepare_sm = false,
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.imp_def_dpn_interrupts_supported = 0,
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.min_channel_number = 1,
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.max_channel_number = 2,
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.modes_supported = MODE_ISOCHRONOUS | MODE_TX_CONTROLLED |
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MODE_RX_CONTROLLED | MODE_FULL_ASYNCHRONOUS,
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.block_packing_mode = true,
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.port_audio_mode_count = 1,
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.port_audio_mode_list = { 0 }
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};
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static const struct soundwire_codec alc5682_codec = {
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.slave = &alc5682_slave,
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.dp0_bra_mode = { &alc5682_dp0_bra_mode },
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.dp0 = &alc5682_dp0,
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.audio_mode = { &alc5682_audio_mode },
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.dpn = {
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{
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.port = 1,
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.source = &alc5682_dpn,
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.sink = &alc5682_dpn,
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},
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{
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.port = 2,
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.source = &alc5682_dpn,
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.sink = &alc5682_dpn,
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},
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{
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.port = 3,
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.source = &alc5682_dpn,
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.sink = &alc5682_dpn,
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},
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{
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.port = 4,
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.source = &alc5682_dpn,
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.sink = &alc5682_dpn,
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}
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}
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};
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static void soundwire_alc5682_fill_ssdt(const struct device *dev)
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{
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struct drivers_soundwire_alc5682_config *config = dev->chip_info;
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const char *scope = acpi_device_scope(dev);
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struct acpi_dp *dsd;
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if (!dev->enabled || !scope)
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return;
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acpigen_write_scope(scope);
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acpigen_write_device(acpi_device_name(dev));
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/* Set codec address IDs. */
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alc5682_address.link_id = dev->path.generic.id;
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alc5682_address.unique_id = dev->path.generic.subid;
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acpigen_write_ADR_soundwire_device(&alc5682_address);
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acpigen_write_name_string("_DDN", config->desc ? : dev->chip_ops->name);
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acpigen_write_STA(acpi_device_status(dev));
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dsd = acpi_dp_new_table("_DSD");
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soundwire_gen_codec(dsd, &alc5682_codec, NULL);
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acpi_dp_write(dsd);
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acpigen_pop_len(); /* Device */
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acpigen_pop_len(); /* Scope */
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}
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static const char *soundwire_alc5682_acpi_name(const struct device *dev)
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{
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struct drivers_soundwire_alc5682_config *config = dev->chip_info;
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static char name[5];
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if (config->name)
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return config->name;
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snprintf(name, sizeof(name), "SW%1X%1X", dev->path.generic.id, dev->path.generic.subid);
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return name;
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}
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static struct device_operations soundwire_alc5682_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.acpi_name = soundwire_alc5682_acpi_name,
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.acpi_fill_ssdt = soundwire_alc5682_fill_ssdt,
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};
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static void soundwire_alc5682_enable(struct device *dev)
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{
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dev->ops = &soundwire_alc5682_ops;
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}
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struct chip_operations drivers_soundwire_alc5682_ops = {
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CHIP_NAME("Realtek ALC5682 SoundWire Codec")
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.enable_dev = soundwire_alc5682_enable
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};
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@ -0,0 +1,11 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __DRIVERS_SOUNDWIRE_ALC5682_CHIP_H__
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#define __DRIVERS_SOUNDWIRE_ALC5682_CHIP_H__
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struct drivers_soundwire_alc5682_config {
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const char *name;
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const char *desc;
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};
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#endif /* __DRIVERS_SOUNDWIRE_ALC5682_CHIP_H__ */
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@ -19,6 +19,9 @@
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#define MIPI_MFG_ID_TOSHIBA 0x0126
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/* Contributing Members */
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#define MIPI_MFG_ID_REALTEK 0x025d
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#define MIPI_DEV_ID_REALTEK_ALC5682 0x5682
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#define MIPI_MFG_ID_MAXIM 0x019f
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#define MIPI_DEV_ID_MAXIM_MAX98373 0x8373
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