From 73d7f3e8378445141f87db95efbeecf76c0c3ab8 Mon Sep 17 00:00:00 2001 From: John Su Date: Wed, 12 Oct 2022 17:39:39 +0800 Subject: [PATCH] mb/google/brya/var/felwinter: adjust I2C5 times for TP This change updates scl_lcnt, scl_hcnt, sda_hold value for I2C5. BUG=b:249031186 BRANCH=brya TEST=TP function is normal from EE check. Signed-off-by: John Su Change-Id: I5e756b7d7e14cace24ef2dfbb323c840c867ae1a Reviewed-on: https://review.coreboot.org/c/coreboot/+/68329 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Frank Wu --- .../google/brya/variants/felwinter/overridetree.cb | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb index 7d02fcf241..44c2d0b931 100644 --- a/src/mainboard/google/brya/variants/felwinter/overridetree.cb +++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb @@ -83,7 +83,12 @@ chip soc/intel/alderlake .speed = I2C_SPEED_FAST, .rise_time_ns = 550, .fall_time_ns = 400, - .data_hold_time_ns = 50, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 160, + .scl_hcnt = 70, + .sda_hold = 40, + } }, }"