mb/google/hatch: Kohaku: Re-setup dual-routing of EMR_GARAGE_DET
The pinctrl driver in the linux kernel automatically turns off SCI routing for all GPIOs exported via ACPI, so this patch sets up dual-routing of the EMR_GARAGE_DET signal so that one can be used for IRQs and one for the SCI wake. Change-Id: Iadeb4502c5a98a72ba651bdcad626609656c196f Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34780 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Shelley Chen <shchen@google.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -30,7 +30,7 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL),
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/* A7 : PP3300_SOC_A */
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PAD_NC(GPP_A7, NONE),
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/* A8 : PEN_GARAGE_DET_L */
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/* A8 : PEN_GARAGE_DET_L (wake) */
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PAD_CFG_GPI_GPIO_DRIVER_SCI(GPP_A8, NONE, DEEP, LEVEL, NONE),
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/* A9 : ESPI_CLK */
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/* A10 : FPMCU_PCH_BOOT1 */
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@ -25,6 +25,8 @@ static const struct pad_config gpio_table[] = {
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PAD_NC(GPP_A6, NONE),
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/* A10 : PEN_RESET_ODL */
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PAD_CFG_GPO(GPP_A10, 1, DEEP),
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/* A16 : EMR_GARAGE_DET (notification) */
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PAD_CFG_GPI_APIC(GPP_A16, NONE, PLTRST, LEVEL, NONE),
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/* A17 : PIRQA# ==> NC */
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PAD_NC(GPP_A17, NONE),
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/* A18 : ISH_GP0 ==> NC */
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@ -112,7 +112,8 @@ chip soc/intel/cannonlake
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end
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chip drivers/generic/gpio_keys
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register "name" = ""PENH""
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register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_A8)"
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# GPP_A16 is the IRQ source, and GPP_A8 is the wake source
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register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_A16)"
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register "key.wake" = "GPE0_DW0_08"
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register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
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register "key.dev_name" = ""EJCT""
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