GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/drallion: Add new SPD file for drallion 

Add the SPD data for MT40A1G16KD-062E:E

BUG=b:139397313
TEST=Compile successfully.

Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
This commit is contained in:
Bora Guvendik 2019-10-09 14:18:38 -07:00 committed by Patrick Georgi
parent 469af0348e
commit 73ffd6acdf
3 changed files with 34 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex Normal file
View File

@ -0,0 +1,32 @@
23 11 0C 03 46 29 00 08 00 60 00 03 02 03 00 00
00 00 05 0D F8 FF 2B 00 6E 6E 6E 11 00 6E F0 0A
20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00
00 00 00 00 00 00 00 00 00 00 00 00 16 36 0B 35
16 36 0B 35 00 00 16 36 0B 35 16 36 0B 35 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 9C B5 00 00 00 00 E7 00 40 36
0F 01 1F 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 7D 21
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 34 41 54 46 35 31 32
36 34 48 5A 2D 33 47 32 45 31 20 20 20 31 80 2C
45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

1
src/mainboard/google/drallion/variants/drallion/Makefile.inc
View File

@ -22,6 +22,7 @@ SPD_SOURCES += hynix_dimm_H5AN8G6NCJR-VKC # 0b10001
SPD_SOURCES += hynix_dimm_H5ANAG6NCMR-VKC # 0b11001 SPD_SOURCES += hynix_dimm_H5ANAG6NCMR-VKC # 0b11001
SPD_SOURCES += samsung_dimm_K4A8G165WC-BCTD # 0b10011 SPD_SOURCES += samsung_dimm_K4A8G165WC-BCTD # 0b10011
SPD_SOURCES += samsung_dimm_K4AAG165WB-MCTD # 0b11011 SPD_SOURCES += samsung_dimm_K4AAG165WB-MCTD # 0b11011
SPD_SOURCES += micron_dimm_MT40A1G16KD-062EE # 0b11010
bootblock-y += gpio.c bootblock-y += gpio.c
ramstage-y += gpio.c ramstage-y += gpio.c

2
src/mainboard/google/drallion/variants/drallion/memory.c
View File

@ -24,7 +24,7 @@ static const int spd_index[32] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 4, 3, 6, 1, 0, 0, 0, 0, 4, 3, 6, 1, 0, 0, 0,
0, 5, 0, 7, 2, 0, 0, 0 0, 5, 8, 7, 2, 0, 0, 0
}; };
const struct cnl_mb_cfg *get_variant_memory_cfg(struct cnl_mb_cfg *mem_cfg) const struct cnl_mb_cfg *get_variant_memory_cfg(struct cnl_mb_cfg *mem_cfg)