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soc/intel/tigerlake: Add ACPI GPIO op 

Add acpigen methods which generate operations to get/set/clear RX/TX GPIOs.
Verify it matches https://doc.coreboot.org/acpi/gpio.html.

BUG=b:149588766
TEST=confirmed with touchscreen gpios.

Signed-off-by: Alex Levin <levinale@chromium.org>
Change-Id: Id9fe26f14a606ceedb9db02d76fe8d466d3a21af
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40550
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Jes Klinke <jbk@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Alex Levin 2020-04-20 21:55:02 -07:00 committed by Furquan Shaikh
parent 988a273396
commit 740c29a478
1 changed files with 37 additions and 0 deletions
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37
src/soc/intel/tigerlake/acpi.c
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@ -330,3 +330,40 @@ int soc_madt_sci_irq_polarity(int sci)
{
return MP_IRQ_POLARITY_HIGH;
}
static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num)
{
/* op (gpio_num) */
acpigen_emit_namestring(op);
acpigen_write_integer(gpio_num);
return 0;
}
static int acpigen_soc_get_gpio_state(const char *op, unsigned int gpio_num)
{
/* Store (op (gpio_num), Local0) */
acpigen_write_store();
acpigen_soc_gpio_op(op, gpio_num);
acpigen_emit_byte(LOCAL0_OP);
return 0;
}
int acpigen_soc_read_rx_gpio(unsigned int gpio_num)
{
return acpigen_soc_get_gpio_state("\\_SB.PCI0.GRXS", gpio_num);
}
int acpigen_soc_get_tx_gpio(unsigned int gpio_num)
{
return acpigen_soc_get_gpio_state("\\_SB.PCI0.GTXS", gpio_num);
}
int acpigen_soc_set_tx_gpio(unsigned int gpio_num)
{
return acpigen_soc_gpio_op("\\_SB.PCI0.STXS", gpio_num);
}
int acpigen_soc_clear_tx_gpio(unsigned int gpio_num)
{
return acpigen_soc_gpio_op("\\_SB.PCI0.CTXS", gpio_num);
}