From 7426358e8186a36eac7341cdb95eb7417fd9e338 Mon Sep 17 00:00:00 2001
From: Robert Chen <robert.chen@quanta.corp-partner.google.com>
Date: Fri, 25 Mar 2022 16:21:23 +0800
Subject: [PATCH] mb/google/dedede/var/drawcia: Add FW_CONFIG probe for EXT_VR

Add FW_CONFIG probe for absent ANPEC APW8738BQBI IC on drawcia.

BUG=b:223687184
TEST=emerge-dedede coreboot

Change-Id: I683049e9d2b10fc9455ef782ce798f1c453073bc
Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63110
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Shou-Chieh Hsu <shouchieh@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
---
 .../google/dedede/variants/drawcia/ramstage.c          | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/src/mainboard/google/dedede/variants/drawcia/ramstage.c b/src/mainboard/google/dedede/variants/drawcia/ramstage.c
index 26f1532274..aed160e12d 100644
--- a/src/mainboard/google/dedede/variants/drawcia/ramstage.c
+++ b/src/mainboard/google/dedede/variants/drawcia/ramstage.c
@@ -4,6 +4,15 @@
 #include <boardid.h>
 #include <device/device.h>
 #include <drivers/usb/acpi/chip.h>
+#include <fw_config.h>
+#include <soc/soc_chip.h>
+
+static void ext_vr_update(void)
+{
+	struct soc_intel_jasperlake_config *cfg = config_of_soc();
+	if (fw_config_probe(FW_CONFIG(EXT_VR, EXT_VR_ABSENT)))
+		cfg->disable_external_bypass_vr = 1;
+}
 
 void variant_devtree_update(void)
 {
@@ -21,4 +30,5 @@ void variant_devtree_update(void)
 
 	config = config_of(lte_usb2);
 	config->reset_gpio = lte_reset_gpio;
+	ext_vr_update();
 }