nb/intel/sandybridge: Always use the same MMCONF_BASE_ADDRESS

'Optimizing' MMCONF_BASE_ADDRESS for the native codepath prevents the
use of fallback/normal with both the native raminit and the mrc.bin.

Using the same MMCONF_BASE_ADDRESS as the mrc.bin codepath means that
128MB less is available to devices using the native raminit. Most
devices reserve 2048M for non memory resources below 4G, which in most
cases is more than adequate. Devices with only 1024M (and that don't
already use the mrc.bin) are:
* lenovo/x220
* lenovo/x230
* lenovo/x131e
* lenovo/x1_carbon_gen1

Those could fail to allocate PCI resources, but on at least x220 with
a somewhat default configuration (USB3 expresscard, Wireless PCIe
card) it still boots fine, so one should not expect many problems from
this change.

Change-Id: I1d0648fe36c88bd9279ac19e5c710055327599fd
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23490
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

src/northbridge/intel/sandybridge/Kconfig

@@ -94,11 +94,9 @@ config BOOTBLOCK_NORTHBRIDGE_INIT
 
 config MMCONF_BASE_ADDRESS
 	hex
-	default 0xf8000000 if USE_NATIVE_RAMINIT
 	default 0xf0000000
 	help
-	  We can optimize the native case but the MRC blob requires it
-	  to be at 0xf0000000.
+	  The MRC blob requires it to be at 0xf0000000.
 
 if USE_NATIVE_RAMINIT