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vendorcode/amd/pi: Create stoney version of amdlib 

Copy the vendorcode/amd/pi/Lib directory into 00670F00 directory and
update the 00670F00 Makefile to use it instead of using the common
version.

This allows changes to stoney without affecting the rest of the AMD
binary PI platforms.

BUG=b:67299330
TEST=Build Gardenia; Build & boot kahlee

Change-Id: I2fe4303f882938e9d917a3001476213f49426455
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/22437
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Martin Roth 2017-11-12 09:59:37 -07:00
parent 059988dbe4
commit 744104e24d
5 changed files with 2320 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1419
src/vendorcode/amd/pi/00670F00/Lib/amdlib.c Normal file
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396
src/vendorcode/amd/pi/00670F00/Lib/amdlib.h Normal file
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/* $NoKeywords:$ */
/**
* @file
*
* AMD Library
*
* Contains interface to the AMD AGESA library
*
* @xrefitem bom "File Content Label" "Release Content"
* @e project: AGESA
* @e sub-project: Lib
* @e \$Revision: 85030 $ @e \$Date: 2012-12-26 00:20:10 -0600 (Wed, 26 Dec 2012) $
*
*/
/*
******************************************************************************
*
* Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
* 2013 - 2014, Sage Electronic Engineering, LLC
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
******************************************************************************
**/
#ifndef _AMD_LIB_H_
#define _AMD_LIB_H_
#include "Porting.h"
#include "AMD.h"
#define IOCF8 0xCF8
#define IOCFC 0xCFC
// Reg Values for ReadCpuReg and WriteCpuReg
#define CR4_REG 0x04
#define DR0_REG 0x10
#define DR1_REG 0x11
#define DR2_REG 0x12
#define DR3_REG 0x13
#define DR7_REG 0x17
// PROTOTYPES FOR amdlib32.asm
UINT8
ReadIo8 (
IN UINT16 Address
);
UINT16
ReadIo16 (
IN UINT16 Address
);
UINT32
ReadIo32 (
IN UINT16 Address
);
VOID
WriteIo8 (
IN UINT16 Address,
IN UINT8 Data
);
VOID
WriteIo16 (
IN UINT16 Address,
IN UINT16 Data
);
VOID
WriteIo32 (
IN UINT16 Address,
IN UINT32 Data
);
UINT8
Read64Mem8 (
IN UINT64 Address
);
UINT16
Read64Mem16 (
IN UINT64 Address
);
UINT32
Read64Mem32 (
IN UINT64 Address
);
VOID
Write64Mem8 (
IN UINT64 Address,
IN UINT8 Data
);
VOID
Write64Mem16 (
IN UINT64 Address,
IN UINT16 Data
);
VOID
Write64Mem32 (
IN UINT64 Address,
IN UINT32 Data
);
UINT64
ReadTSC (
void
);
// MSR
VOID
LibAmdMsrRead (
IN UINT32 MsrAddress,
OUT UINT64 *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdMsrWrite (
IN UINT32 MsrAddress,
IN UINT64 *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
// IO
VOID
LibAmdIoRead (
IN ACCESS_WIDTH AccessWidth,
IN UINT16 IoAddress,
OUT VOID *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdIoWrite (
IN ACCESS_WIDTH AccessWidth,
IN UINT16 IoAddress,
IN CONST VOID *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdIoRMW (
IN ACCESS_WIDTH AccessWidth,
IN UINT16 IoAddress,
IN CONST VOID *Data,
IN CONST VOID *DataMask,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdIoPoll (
IN ACCESS_WIDTH AccessWidth,
IN UINT16 IoAddress,
IN CONST VOID *Data,
IN CONST VOID *DataMask,
IN UINT64 Delay,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
// Memory or MMIO
VOID
LibAmdMemRead (
IN ACCESS_WIDTH AccessWidth,
IN UINT64 MemAddress,
OUT VOID *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdMemWrite (
IN ACCESS_WIDTH AccessWidth,
IN UINT64 MemAddress,
IN CONST VOID *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdMemRMW (
IN ACCESS_WIDTH AccessWidth,
IN UINT64 MemAddress,
IN CONST VOID *Data,
IN CONST VOID *DataMask,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdMemPoll (
IN ACCESS_WIDTH AccessWidth,
IN UINT64 MemAddress,
IN CONST VOID *Data,
IN CONST VOID *DataMask,
IN UINT64 Delay,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
// PCI
VOID
LibAmdPciRead (
IN ACCESS_WIDTH AccessWidth,
IN PCI_ADDR PciAddress,
OUT VOID *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdPciWrite (
IN ACCESS_WIDTH AccessWidth,
IN PCI_ADDR PciAddress,
IN CONST VOID *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdPciRMW (
IN ACCESS_WIDTH AccessWidth,
IN PCI_ADDR PciAddress,
IN CONST VOID *Data,
IN CONST VOID *DataMask,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdPciPoll (
IN ACCESS_WIDTH AccessWidth,
IN PCI_ADDR PciAddress,
IN CONST VOID *Data,
IN CONST VOID *DataMask,
IN UINT64 Delay,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdPciReadBits (
IN PCI_ADDR Address,
IN UINT8 Highbit,
IN UINT8 Lowbit,
OUT UINT32 *Value,
IN AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdPciWriteBits (
IN PCI_ADDR Address,
IN UINT8 Highbit,
IN UINT8 Lowbit,
IN CONST UINT32 *Value,
IN AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdPciFindNextCap (
IN OUT PCI_ADDR *Address,
IN AMD_CONFIG_PARAMS *StdHeader
);
// CPUID
VOID
LibAmdCpuidRead (
IN UINT32 CpuidFcnAddress,
OUT CPUID_DATA *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
// Utility Functions
VOID
LibAmdMemFill (
IN VOID *Destination,
IN UINT8 Value,
IN UINTN FillLength,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdMemCopy (
IN VOID *Destination,
IN CONST VOID *Source,
IN UINTN CopyLength,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
CONST VOID *
LibAmdLocateImage (
IN CONST VOID *StartAddress,
IN CONST VOID *EndAddress,
IN UINT32 Alignment,
IN CONST CHAR8 ModuleSignature[8]
);
UINT32
LibAmdGetPackageType (
IN AMD_CONFIG_PARAMS *StdHeader
);
BOOLEAN
LibAmdVerifyImageChecksum (
IN CONST VOID *ImagePtr
);
UINT8
LibAmdBitScanReverse (
IN UINT32 value
);
UINT8
LibAmdBitScanForward (
IN UINT32 value
);
VOID
LibAmdReadCpuReg (
IN UINT8 RegNum,
OUT UINT32 *Value
);
VOID
LibAmdWriteCpuReg (
IN UINT8 RegNum,
IN UINT32 Value
);
VOID
LibAmdWriteBackInvalidateCache (
void
);
VOID
LibAmdSimNowEnterDebugger (
void
);
VOID
LibAmdHDTBreakPoint (
void
);
UINT8
LibAmdAccessWidth (
IN ACCESS_WIDTH AccessWidth
);
VOID
LibAmdCLFlush (
IN UINT64 Address,
IN UINT8 Count
);
VOID
StopHere (
void
);
VOID
LibAmdFinit (
void
);
VOID
LibAmdFnclex (
void
);
VOID
LibAmdReadMxcsr (
OUT UINT32 *Value
);
VOID
LibAmdWriteMxcsr (
IN UINT32 *Value
);
#endif // _AMD_LIB_H_

188
src/vendorcode/amd/pi/00670F00/Lib/imc/HwmLateService.c Normal file
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@ -0,0 +1,188 @@
/* $NoKeywords:$ */
/**
* @file
*
* Config FCH Hwm controller
*
* Init Hwm Controller features.
*
* @xrefitem bom "File Content Label" "Release Content"
* @e project: AGESA
* @e sub-project: FCH
* @e \$Revision: 84150 $ @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
*
*/
/*
*****************************************************************************
*
* Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
****************************************************************************
*/
#include "FchPlatform.h"
#include "Filecode.h"
#define FILECODE PROC_FCH_HWM_FAMILY_YANGTZE_YANGTZEHWMLATESERVICE_FILECODE
/**
* Table for Function Number
*
*
*
*
*/
STATIC UINT8 FunctionNumber[] =
{
Fun_81,
Fun_83,
Fun_85,
Fun_89,
};
/**
* Table for Max Thermal Zone
*
*
*
*
*/
UINT8 MaxZone[] =
{
4,
4,
4,
4,
};
/**
* Table for Max Register
*
*
*
*
*/
UINT8 MaxRegister[] =
{
MSG_REG9,
MSG_REGB,
MSG_REG9,
MSG_REGA,
};
/*-------------------------------------------------------------------------------
;Procedure: IsZoneFuncEnable
;
;Description: This routine will check every zone support function with BitMap from user define
;
;
;Exit: None
;
;Modified: None
;
;-----------------------------------------------------------------------------
*/
STATIC BOOLEAN
IsZoneFuncEnable (
IN UINT16 Flag,
IN UINT8 func,
IN UINT8 Zone
)
{
return (BOOLEAN) (((Flag >> (func *4)) & 0xF) & ((UINT8 )1 << Zone));
}
/*-------------------------------------------------------------------------------
;Procedure: FchECfancontrolservice
;
;Description: This routine service EC fan policy
;
;
;Exit: None
;
;Modified: None
;
;-----------------------------------------------------------------------------
*/
VOID
FchECfancontrolservice (
IN VOID *FchDataPtr
)
{
UINT8 ZoneNum;
UINT8 FunNum;
UINT8 RegNum;
UINT8 *CurPoint;
UINT8 FunIndex;
BOOLEAN IsSendEcMsg;
FCH_DATA_BLOCK *LocalCfgPtr;
AMD_CONFIG_PARAMS *StdHeader;
LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;
StdHeader = LocalCfgPtr->StdHeader;
if (!IsImcEnabled (StdHeader)) {
return; //IMC is not enabled
}
CurPoint = &LocalCfgPtr->Imc.EcStruct.MsgFun81Zone0MsgReg0 + MaxZone[0] * (MaxRegister[0] - MSG_REG0 + 1);
for ( FunIndex = 1; FunIndex <= 3; FunIndex++ ) {
FunNum = FunctionNumber[FunIndex];
for ( ZoneNum = 0; ZoneNum < MaxZone[FunIndex]; ZoneNum++ ) {
IsSendEcMsg = IsZoneFuncEnable (LocalCfgPtr->Imc.EcStruct.IMCFUNSupportBitMap, FunIndex, ZoneNum);
if (IsSendEcMsg) {
for ( RegNum = MSG_REG0; RegNum <= MaxRegister[FunIndex]; RegNum++ ) {
WriteECmsg (RegNum, AccessWidth8, CurPoint, StdHeader);
CurPoint += 1;
}
WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &FunNum, StdHeader); // function number
WaitForEcLDN9MailboxCmdAck (StdHeader);
} else {
CurPoint += (MaxRegister[FunIndex] - MSG_REG0 + 1);
}
}
}
CurPoint = &LocalCfgPtr->Imc.EcStruct.MsgFun81Zone0MsgReg0;
for ( FunIndex = 0; FunIndex <= 0; FunIndex++ ) {
FunNum = FunctionNumber[FunIndex];
for ( ZoneNum = 0; ZoneNum < MaxZone[FunIndex]; ZoneNum++ ) {
IsSendEcMsg = IsZoneFuncEnable (LocalCfgPtr->Imc.EcStruct.IMCFUNSupportBitMap, FunIndex, ZoneNum);
if (IsSendEcMsg) {
for ( RegNum = MSG_REG0; RegNum <= MaxRegister[FunIndex]; RegNum++ ) {
if (RegNum == MSG_REG2) {
*CurPoint &= 0xFE;
}
WriteECmsg (RegNum, AccessWidth8, CurPoint, StdHeader);
CurPoint += 1;
}
WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &FunNum, StdHeader); // function number
WaitForEcLDN9MailboxCmdAck (StdHeader);
} else {
CurPoint += (MaxRegister[FunIndex] - MSG_REG0 + 1);
}
}
}
}

314
src/vendorcode/amd/pi/00670F00/Lib/imc/ImcLib.c Normal file
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@ -0,0 +1,314 @@
/* $NoKeywords:$ */
/**
* @file
*
* FCH IMC lib
*
*
*
* @xrefitem bom "File Content Label" "Release Content"
* @e project: AGESA
* @e sub-project: FCH
* @e \$Revision: 87213 $ @e \$Date: 2013-01-30 15:37:54 -0600 (Wed, 30 Jan 2013) $
*
*/
/*
*****************************************************************************
*
* Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
****************************************************************************
*/
#include "FchPlatform.h"
#include "Filecode.h"
#define FILECODE PROC_FCH_IMC_IMCLIB_FILECODE
/**
* WriteECmsg
*
*
*
* @param[in] Address - Address
* @param[in] OpFlag - Access width
* @param[in] *Value - Out Value pointer
* @param[in] StdHeader
*
*/
VOID
WriteECmsg (
IN UINT8 Address,
IN UINT8 OpFlag,
IN VOID *Value,
IN AMD_CONFIG_PARAMS *StdHeader
)
{
UINT8 Index;
ASSERT (OpFlag < AccessWidth64); /* TODO: Add the assertion to make it not crash for now. */
OpFlag = (OpFlag & 0x7f) - 1;
if (OpFlag == 0x02) {
OpFlag = 0x03;
}
for (Index = 0; Index <= OpFlag; Index++) {
/// EC_LDN9_MAILBOX_BASE_ADDRESS
LibAmdIoWrite (AccessWidth8, MailBoxPort, &Address, StdHeader);
Address++;
/// EC_LDN9_MAILBOX_BASE_ADDRESS
LibAmdIoWrite (AccessWidth8, MailBoxPort + 1, (UINT8 *)Value + Index, StdHeader);
}
}
/**
* ReadECmsg
*
*
*
* @param[in] Address - Address
* @param[in] OpFlag - Access width
* @param[out] *Value - Out Value pointer
* @param[in] StdHeader
*
*/
VOID
ReadECmsg (
IN UINT8 Address,
IN UINT8 OpFlag,
OUT VOID *Value,
IN AMD_CONFIG_PARAMS *StdHeader
)
{
UINT8 Index;
ASSERT (OpFlag < AccessWidth64); /* TODO: Add the assertion to make it not crash for now. */
OpFlag = (OpFlag & 0x7f) - 1;
if (OpFlag == 0x02) {
OpFlag = 0x03;
}
for (Index = 0; Index <= OpFlag; Index++) {
/// EC_LDN9_MAILBOX_BASE_ADDRESS
LibAmdIoWrite (AccessWidth8, MailBoxPort, &Address, StdHeader);
Address++;
/// EC_LDN9_MAILBOX_BASE_ADDRESS
LibAmdIoRead (AccessWidth8, MailBoxPort + 1, (UINT8 *)Value + Index, StdHeader);
}
}
/**
* WaitForEcLDN9MailboxCmdAck
*
*
* @param[in] StdHeader
*
*/
VOID
WaitForEcLDN9MailboxCmdAck (
IN AMD_CONFIG_PARAMS *StdHeader
)
{
UINT8 Msgdata;
UINT16 Delaytime;
Msgdata = 0;
for (Delaytime = 0; Delaytime < 0xFFFF; Delaytime++) {
ReadECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader);
if ( Msgdata == 0xfa) {
break;
}
FchStall (5, StdHeader); /// Wait for 1ms
}
}
/**
* ImcSleep - IMC Sleep.
*
*
* @param[in] FchDataPtr Fch configuration structure pointer.
*
*/
VOID
ImcSleep (
IN VOID *FchDataPtr
)
{
UINT8 Msgdata;
FCH_DATA_BLOCK *LocalCfgPtr;
AMD_CONFIG_PARAMS *StdHeader;
LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;
StdHeader = LocalCfgPtr->StdHeader;
if (!(IsImcEnabled (StdHeader)) ) {
return; ///IMC is not enabled
}
Msgdata = 0x00;
WriteECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader);
Msgdata = 0xB4;
WriteECmsg (MSG_REG1, AccessWidth8, &Msgdata, StdHeader);
Msgdata = 0x00;
WriteECmsg (MSG_REG2, AccessWidth8, &Msgdata, StdHeader);
Msgdata = 0x96;
WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &Msgdata, StdHeader);
WaitForEcLDN9MailboxCmdAck (StdHeader);
}
/**
* SoftwareDisableImc - Software disable IMC strap
*
*
* @param[in] FchDataPtr Fch configuration structure pointer.
*
*/
VOID
SoftwareDisableImc (
IN VOID *FchDataPtr
)
{
UINT8 ValueByte;
UINT8 PortStatusByte;
UINT32 AbValue;
UINT32 ABStrapOverrideReg;
AMD_CONFIG_PARAMS *StdHeader;
StdHeader = ((FCH_DATA_BLOCK *) FchDataPtr)->StdHeader;
GetChipSysMode (&PortStatusByte, StdHeader);
RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REGC8 + 3, AccessWidth8, 0x7F, BIT7, StdHeader);
ReadPmio (0xBF, AccessWidth8, &ValueByte, StdHeader);
ReadMem ((ACPI_MMIO_BASE + MISC_BASE + FCH_MISC_REG80), AccessWidth32, &AbValue);
ABStrapOverrideReg = AbValue;
ABStrapOverrideReg &= ~BIT2; // bit2=0 EcEnableStrap
WriteMem ((ACPI_MMIO_BASE + MISC_BASE + 0x84), AccessWidth32, &ABStrapOverrideReg);
ReadPmio (FCH_PMIOA_REGD7, AccessWidth8, &ValueByte, StdHeader);
ValueByte |= BIT1;
WritePmio (FCH_PMIOA_REGD7, AccessWidth8, &ValueByte, StdHeader);
ValueByte = 06;
LibAmdIoWrite (AccessWidth8, 0xcf9, &ValueByte, StdHeader);
FchStall (0xffffffff, StdHeader);
}
/**
* ImcDisableSurebootTimer - IMC Disable Sureboot Timer.
*
*
* @param[in] FchDataPtr Fch configuration structure pointer.
*
*/
VOID
ImcDisableSurebootTimer (
IN VOID *FchDataPtr
)
{
UINT8 Msgdata;
AMD_CONFIG_PARAMS *StdHeader;
StdHeader = ((FCH_DATA_BLOCK *) FchDataPtr)->StdHeader;
if (!(IsImcEnabled (StdHeader)) ) {
return; ///IMC is not enabled
}
ImcWakeup (FchDataPtr);
Msgdata = 0x00;
WriteECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader);
Msgdata = 0x01;
WriteECmsg (MSG_REG1, AccessWidth8, &Msgdata, StdHeader);
Msgdata = 0x00;
WriteECmsg (MSG_REG2, AccessWidth8, &Msgdata, StdHeader);
Msgdata = 0x94;
WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &Msgdata, StdHeader);
WaitForEcLDN9MailboxCmdAck (StdHeader);
ImcSleep (FchDataPtr);
}
/**
* ImcWakeup - IMC Wakeup.
*
*
* @param[in] FchDataPtr Fch configuration structure pointer.
*
*/
VOID
ImcWakeup (
IN VOID *FchDataPtr
)
{
UINT8 Msgdata;
AMD_CONFIG_PARAMS *StdHeader;
StdHeader = ((FCH_DATA_BLOCK *) FchDataPtr)->StdHeader;
if (!(IsImcEnabled (StdHeader)) ) {
return; ///IMC is not enabled
}
Msgdata = 0x00;
WriteECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader);
Msgdata = 0xB5;
WriteECmsg (MSG_REG1, AccessWidth8, &Msgdata, StdHeader);
Msgdata = 0x00;
WriteECmsg (MSG_REG2, AccessWidth8, &Msgdata, StdHeader);
Msgdata = 0x96;
WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &Msgdata, StdHeader);
WaitForEcLDN9MailboxCmdAck (StdHeader);
}
/**
* ImcIdle - IMC Idle.
*
*
* @param[in] FchDataPtr Fch configuration structure pointer.
*
*/
VOID
ImcIdle (
IN VOID *FchDataPtr
)
{
UINT8 Msgdata;
AMD_CONFIG_PARAMS *StdHeader;
StdHeader = ((FCH_DATA_BLOCK *) FchDataPtr)->StdHeader;
if (!(IsImcEnabled (StdHeader)) ) {
return; ///IMC is not enabled
}
Msgdata = 0x00;
WriteECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader);
Msgdata = 0x01;
WriteECmsg (MSG_REG1, AccessWidth8, &Msgdata, StdHeader);
Msgdata = 0x00;
WriteECmsg (MSG_REG2, AccessWidth8, &Msgdata, StdHeader);
Msgdata = 0x98;
WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &Msgdata, StdHeader);
WaitForEcLDN9MailboxCmdAck (StdHeader);
}

6
src/vendorcode/amd/pi/00670F00/Makefile.inc
View File

@ -40,7 +40,7 @@ AGESA_INC += -I$(AGESA_ROOT)/binaryPI
AGESA_INC += -I$(AGESA_ROOT)
AGESA_INC += -I$(AGESA_ROOT)/Include
AGESA_INC += -I$(src)/vendorcode/amd/pi
AGESA_INC += -I$(src)/vendorcode/amd/pi/Lib
AGESA_INC += -I$(AGESA_ROOT)/Lib
AGESA_INC += -I$(AGESA_ROOT)/Proc
AGESA_INC += -I$(AGESA_ROOT)/Proc/Common
@ -96,14 +96,14 @@ $(call src-to-obj,libagesa,$1): $(agesa_src_path)/$(notdir $1) $(obj)/config.h $
endef
agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/Lib/*.[cS])
agesa_raw_files += $(wildcard $(AGESA_ROOT)/Lib/*.[cS])
agesa_raw_files += $(wildcard $(AGESA_ROOT)/binaryPI/*.[cS])
agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Fch/Common/*.[cS])
agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Psp/PspBaseLib/*.[cS])
ifeq ($(CONFIG_STONEYRIDGE_IMC_FWM),y)
agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/Lib/imc/*.c)
agesa_raw_files += $(wildcard $(AGESA_ROOT)/Lib/imc/*.c)
endif
classes-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += libagesa