mb/{clevo/cml-u,system76/lemp9}: Clarify `gen2_dec` use

This I/O range is for a PM channel on the EC, not the PCH PMC.

Change-Id: I64422e537c1edcd0673cf87f16139fb117b10e75
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51604
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2021-03-17 19:33:19 +01:00 committed by Patrick Georgi
parent 90ae08922d
commit 747a2fc90e
2 changed files with 2 additions and 2 deletions

View File

@ -189,7 +189,7 @@ chip soc/intel/cannonlake
# LPC configuration from lspci -s 1f.0 -xxx # LPC configuration from lspci -s 1f.0 -xxx
# Address 0x84: Decode 0x80 - 0x8F (Port 80) # Address 0x84: Decode 0x80 - 0x8F (Port 80)
register "gen1_dec" = "0x000c0081" register "gen1_dec" = "0x000c0081"
# Address 0x88: Decode 0x68 - 0x6F (PMC) # Address 0x88: Decode 0x68 - 0x6F (EC PM channel)
register "gen2_dec" = "0x00040069" register "gen2_dec" = "0x00040069"
# Address 0x8C: Decode 0xE00 - 0xEFF (AP/EC command) # Address 0x8C: Decode 0xE00 - 0xEFF (AP/EC command)
register "gen3_dec" = "0x00fc0e01" register "gen3_dec" = "0x00fc0e01"

View File

@ -183,7 +183,7 @@ chip soc/intel/cannonlake
# LPC configuration from lspci -s 1f.0 -xxx # LPC configuration from lspci -s 1f.0 -xxx
# Address 0x84: Decode 0x80 - 0x8F (Port 80) # Address 0x84: Decode 0x80 - 0x8F (Port 80)
register "gen1_dec" = "0x000c0081" register "gen1_dec" = "0x000c0081"
# Address 0x88: Decode 0x68 - 0x6F (PMC) # Address 0x88: Decode 0x68 - 0x6F (EC PM channel)
register "gen2_dec" = "0x00040069" register "gen2_dec" = "0x00040069"
# Address 0x8C: Decode 0xE00 - 0xEFF (AP/EC command) # Address 0x8C: Decode 0xE00 - 0xEFF (AP/EC command)
register "gen3_dec" = "0x00fc0E01" register "gen3_dec" = "0x00fc0E01"