From 74a4175912cfdb6d115dd0f7f58c80fb5ff192ca Mon Sep 17 00:00:00 2001
From: Mohammed Habibulla <moch@chromium.org>
Date: Tue, 12 Nov 2013 13:29:43 -0800
Subject: [PATCH] google/panther: Make sure the S5 power status is on track

(panther port of I933c475f693b0271f86b5166eb2c9b3873f1c2c6)

BUG=none
BRANCH=none
TEST=boot test on panther

Change-Id: I5958a8d701901706eaa38df4323120c8352fea5c
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/176563
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: http://review.coreboot.org/5993
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
---
 src/mainboard/google/panther/devicetree.cb | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mainboard/google/panther/devicetree.cb b/src/mainboard/google/panther/devicetree.cb
index 39d4f0677d..8bce6919e8 100644
--- a/src/mainboard/google/panther/devicetree.cb
+++ b/src/mainboard/google/panther/devicetree.cb
@@ -110,6 +110,7 @@ chip northbridge/intel/haswell
 					device pnp 2e.4 on # Environment Controller
 						io 0x60 = 0x700
 						io 0x62 = 0x710
+						irq 0xfa = 0x12
 					end
 					device pnp 2e.7 on # GPIO
 						io 0x60 = 0x720