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mb/google/dedede: Enable Heci1 device 

Enable heci1 device from devicetree for PCI enumeration. This is
required for ME status dump using HFSTSx resgisters in PCI config
space. Heci1 device is later disabled through heci disable flow.

TEST=Build, boot waddledoo. ME status dump is seen in console logs.
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>

Change-Id: Icb77db3f0666c2d14ebef2c3214564346d1fd3c9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41807
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Aamir Bohra 2020-05-28 10:00:16 +05:30 committed by Karthik Ramasubramanian
parent 11217de375
commit 74b1919f17
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/google/dedede/variants/baseboard/devicetree.cb
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@ -258,7 +258,7 @@ chip soc/intel/jasperlake
device pci 15.1 on end # I2C 1 device pci 15.1 on end # I2C 1
device pci 15.2 on end # I2C 2 device pci 15.2 on end # I2C 2
device pci 15.3 on end # I2C 3 device pci 15.3 on end # I2C 3
device pci 16.0 off end # HECI 1 device pci 16.0 on end # HECI 1
device pci 16.1 off end # HECI 2 device pci 16.1 off end # HECI 2
device pci 16.4 off end # HECI 3 device pci 16.4 off end # HECI 3
device pci 16.5 off end # HECI 4 device pci 16.5 off end # HECI 4