inteltool: basic poulsbo sch support.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -464,7 +464,7 @@ int print_intel_core_msrs(void)
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/* Get CPU family and model, not the stepping
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/* Get CPU family and model, not the stepping
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* (TODO: extended family/model)
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* (TODO: extended family/model)
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*/
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*/
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id = cpuid(1) & 0xff0;
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id = cpuid(1) & 0xfffff0;
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for (i = 0; i < ARRAY_SIZE(cpulist); i++) {
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for (i = 0; i < ARRAY_SIZE(cpulist); i++) {
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if(cpulist[i].model == id) {
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if(cpulist[i].model == id) {
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cpu = &cpulist[i];
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cpu = &cpulist[i];
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@ -45,7 +45,9 @@ static const struct {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82G33, "P35/G33/G31/P31" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82G33, "P35/G33/G31/P31" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q33, "Q33" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q33, "Q33" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X58, "X58" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X58, "X58" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GS45, "GS45ME-GMCH" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GS45, "GS45ME" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_POULSBO, "SCH Poulsbo" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC, "SCH Poulsbo" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10R, "ICH10R" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10R, "ICH10R" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DH, "ICH9DH" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DH, "ICH9DH" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DO, "ICH9DO" },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DO, "ICH9DO" },
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@ -261,8 +263,16 @@ int main(int argc, char *argv[])
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}
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}
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id = cpuid(1);
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id = cpuid(1);
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printf("Intel CPU: Family %x, Model %x\n",
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(id >> 8) & 0xf, (id >> 4) & 0xf);
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/* Intel has suggested applications to display the family of a CPU as
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* the sum of the "Family" and the "Extended Family" fields shown
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* above, and the model as the sum of the "Model" and the 4-bit
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* left-shifted "Extended Model" fields.
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* http://download.intel.com/design/processor/applnots/24161832.pdf
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*/
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printf("Intel CPU: Processor Type: %x, Family %x, Model %x, Stepping %x\n",
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(id >> 12) & 0x3, ((id >> 8) & 0xf) + ((id >> 20) & 0xff),
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((id >> 12) & 0xf0) + ((id >> 4) & 0xf), (id & 0xf));
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/* Determine names */
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/* Determine names */
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for (i = 0; i < ARRAY_SIZE(supported_chips_list); i++)
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for (i = 0; i < ARRAY_SIZE(supported_chips_list); i++)
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@ -51,6 +51,7 @@
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#define PCI_DEVICE_ID_INTEL_ICH9M 0x2919
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#define PCI_DEVICE_ID_INTEL_ICH9M 0x2919
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#define PCI_DEVICE_ID_INTEL_ICH9ME 0x2917
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#define PCI_DEVICE_ID_INTEL_ICH9ME 0x2917
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#define PCI_DEVICE_ID_INTEL_ICH10R 0x3a16
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#define PCI_DEVICE_ID_INTEL_ICH10R 0x3a16
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#define PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC 0x8119
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#define PCI_DEVICE_ID_INTEL_82810 0x7120
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#define PCI_DEVICE_ID_INTEL_82810 0x7120
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#define PCI_DEVICE_ID_INTEL_82810DC 0x7122
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#define PCI_DEVICE_ID_INTEL_82810DC 0x7122
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@ -66,6 +67,7 @@
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#define PCI_DEVICE_ID_INTEL_82Q33 0x29d0
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#define PCI_DEVICE_ID_INTEL_82Q33 0x29d0
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#define PCI_DEVICE_ID_INTEL_GS45 0x2a40
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#define PCI_DEVICE_ID_INTEL_GS45 0x2a40
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#define PCI_DEVICE_ID_INTEL_X58 0x3405
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#define PCI_DEVICE_ID_INTEL_X58 0x3405
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#define PCI_DEVICE_ID_INTEL_SCH_POULSBO 0x8100
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#define PCI_DEVICE_ID_INTEL_82443LX 0x7180
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#define PCI_DEVICE_ID_INTEL_82443LX 0x7180
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/* 82443BX has a different device ID if AGP is disabled (hardware-wise). */
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/* 82443BX has a different device ID if AGP is disabled (hardware-wise). */
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