We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.

As both ioapic.h and acpi.h define a macro named "NMI", rename one
of them (NMI -> NMIType in acpi.h).

Abuild-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/arch/i386/include/arch/acpi.h

@@ -175,7 +175,7 @@ enum acpi_apic_types {
 	LocalApic		= 0,
 	IOApic			= 1,
 	IRQSourceOverride	= 2,
-	NMI			= 3,
+	NMIType			= 3,
 	LocalApicNMI		= 4,
 	LApicAddressOverride	= 5,
 	IOSApic			= 6,

src/cpu/amd/sc520/sc520.c

@@ -4,6 +4,7 @@
 
 #include <console/console.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include <stdint.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -63,7 +64,7 @@ static void sc520_read_resources(device_t dev)
 	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/mainboard/amd/dbm690t/acpi_tables.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -59,8 +60,6 @@ static void dump_mem(u32 start, u32 end)
 
 extern const unsigned char AmlCode[];
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/amd/mahogany/acpi_tables.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -66,8 +67,6 @@ extern const unsigned char AmlCode_ssdt4[];
 extern const unsigned char AmlCode_ssdt5[];
 #endif
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/amd/mahogany_fam10/acpi_tables.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -56,8 +57,6 @@ extern const unsigned char AmlCode_ssdt4[];
 extern const unsigned char AmlCode_ssdt5[];
 #endif
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/amd/pistachio/acpi_tables.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -59,8 +60,6 @@ static void dump_mem(u32 start, u32 end)
 
 extern const unsigned char AmlCode[];
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/amd/serengeti_cheetah/acpi_tables.c

@@ -11,13 +11,13 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/amdk8_sysconf.h>
 #include "northbridge/amd/amdk8/amdk8_acpi.h"
-
 #include "mb_sysconf.h"
 
 #define DUMP_ACPI_TABLES 0
@@ -45,8 +45,6 @@ extern const unsigned char AmlCode_ssdt3[];
 extern const unsigned char AmlCode_ssdt4[];
 #endif
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/amd/serengeti_cheetah/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -54,7 +55,7 @@ static void *smp_write_config_table(void *v)
         smp_write_bus(mc, m->bus_isa, "ISA   ");
 
 /*I/O APICs:	APIC ID	Version	State		Address*/
-	smp_write_ioapic(mc, m->apicid_8111, 0x11, 0xfec00000); //8111
+	smp_write_ioapic(mc, m->apicid_8111, 0x11, IO_APIC_ADDR); //8111
         {
                 device_t dev;
 		struct resource *res;

src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -56,8 +57,6 @@ extern const unsigned char AmlCode_ssdt4[];
 extern const unsigned char AmlCode_ssdt5[];
 #endif
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/amd/serengeti_cheetah_fam10/mptable.c

@@ -19,6 +19,7 @@
 
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -74,7 +75,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, m->bus_isa, "ISA   ");
 
 	/*I/O APICs:	APIC ID	Version	State	Address*/
-	smp_write_ioapic(mc, m->apicid_8111, 0x11, 0xfec00000); //8111
+	smp_write_ioapic(mc, m->apicid_8111, 0x11, IO_APIC_ADDR); //8111
 	{
 		device_t dev;
 		struct resource *res;

src/mainboard/amd/tilapia_fam10/acpi_tables.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -56,8 +57,6 @@ extern const unsigned char AmlCode_ssdt4[];
 extern const unsigned char AmlCode_ssdt5[];
 #endif
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/arima/hdama/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -201,7 +202,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, bus_isa, "ISA	  ");
 
 	/* IOAPIC handling */
-	smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
 	{
 		device_t dev;
 		struct resource *res;

src/mainboard/asrock/939a785gmh/acpi_tables.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -66,8 +67,6 @@ extern const unsigned char AmlCode_ssdt4[];
 extern const unsigned char AmlCode_ssdt5[];
 #endif
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/asus/a8v-e_se/acpi_tables.c

@@ -26,6 +26,7 @@
 #include <string.h>
 #include <arch/acpi.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/device.h>
 #include <device/pci_ids.h>
 #include "southbridge/via/vt8237r/vt8237r.h"
@@ -59,7 +60,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 
 	/* Write SB IOAPIC. */
 	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
-				VT8237R_APIC_ID, VT8237R_APIC_BASE, 0);
+				VT8237R_APIC_ID, IO_APIC_ADDR, 0);
 
 	/* Write NB IOAPIC. */
 	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,

src/mainboard/asus/a8v-e_se/mptable.c

@@ -20,6 +20,7 @@
 #include <string.h>
 #include <stdint.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include "southbridge/via/vt8237r/vt8237r.h"
 #include "southbridge/via/k8t890/k8t890.h"
 
@@ -62,7 +63,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, bus_isa, "ISA   ");
 
 	/* I/O APICs:	APIC ID	Version	State		Address */
-	smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, VT8237R_APIC_BASE);
+	smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, IO_APIC_ADDR);
 	smp_write_ioapic(mc, K8T890_APIC_ID, 0x20, K8T890_APIC_BASE);
 
 	mptable_add_isa_interrupts(mc, bus_isa, VT8237R_APIC_ID, 0);

src/mainboard/asus/m2v-mx_se/acpi_tables.c

@@ -26,6 +26,7 @@
 #include <string.h>
 #include <arch/acpi.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/device.h>
 #include <device/pci_ids.h>
 #include "southbridge/via/vt8237r/vt8237r.h"
@@ -61,7 +62,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 
 	/* Write SB IOAPIC. */
 	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
-				VT8237R_APIC_ID, VT8237R_APIC_BASE, 0);
+				VT8237R_APIC_ID, IO_APIC_ADDR, 0);
 
 	/* Write NB IOAPIC. */
 	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,

src/mainboard/asus/m4a785-m/acpi_tables.c

@@ -20,12 +20,12 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/amdfam10_sysconf.h>
-
 #include "mb_sysconf.h"
 
 #define DUMP_ACPI_TABLES 0
@@ -56,8 +56,6 @@ extern const unsigned char AmlCode_ssdt4[];
 extern const unsigned char AmlCode_ssdt5[];
 #endif
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/asus/p2b-d/mptable.c

@@ -20,6 +20,7 @@
 
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -56,7 +57,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, 2, "ISA   ");
 
 	/* I/O APICs: APIC ID  Version  State  Address */
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
 	{
 		device_t dev;
 		struct resource *res;

src/mainboard/asus/p2b-ds/mptable.c

@@ -20,6 +20,7 @@
 
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -55,7 +56,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, 1, "ISA   ");
 
 	/* I/O APICs:	APIC ID	Version	State		Address */
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
 	{
 		device_t dev;
 		struct resource *res;

src/mainboard/dell/s1850/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -109,7 +110,7 @@ static void *smp_write_config_table(void *v)
 
 	/* IOAPIC handling */
 
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
 	{
 		struct resource *res;
 		device_t dev;

src/mainboard/emulation/qemu-x86/northbridge.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include <stdint.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -64,7 +65,7 @@ static void cpu_pci_domain_read_resources(struct device *dev)
 	/* Reserve space for the IOAPIC.  This should be in the Southbridge,
 	 * but I couldn't tell which device to put it in. */
 	res = new_resource(dev, 2);
-	res->base = 0xfec00000UL;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x100000UL;
 	res->limit = 0xffffffffUL;
 	res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED |

src/mainboard/getac/p470/acpi_tables.c

@@ -23,6 +23,7 @@
 #include <string.h>
 #include <console/console.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <arch/acpigen.h>
 #include <arch/smp/mpspec.h>
 #include <device/device.h>
@@ -131,8 +132,6 @@ static long acpi_create_ecdt(acpi_ecdt_t * ecdt)
 	return header->length;
 }
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_madt(unsigned long current)
 {
 	/* Local APICs */

src/mainboard/getac/p470/mptable.c

@@ -19,11 +19,11 @@
  * MA 02110-1301 USA
  */
 
-
 #include <device/device.h>
 #include <device/pci.h>
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <string.h>
 #include <stdint.h>
 
@@ -67,7 +67,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, isa_bus, "ISA   ");
 
 	/* I/O APICs:	APIC ID	Version	State		Address */
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
 
 	/* Legacy Interrupts */
 	mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);

src/mainboard/gigabyte/ma785gmt/acpi_tables.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -54,8 +55,6 @@ extern const unsigned char AmlCode_ssdt4[];
 extern const unsigned char AmlCode_ssdt5[];
 #endif
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/gigabyte/ma78gm/acpi_tables.c

@@ -20,13 +20,13 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/amdfam10_sysconf.h>
 
-
 #define DUMP_ACPI_TABLES 0
 
 #if DUMP_ACPI_TABLES == 1
@@ -55,8 +55,6 @@ extern const unsigned char AmlCode_ssdt4[];
 extern const unsigned char AmlCode_ssdt5[];
 #endif
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/hp/dl145_g1/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -60,7 +61,7 @@ static void *smp_write_config_table(void *v)
 
 
 /*I/O APICs:	APIC ID	Version	State		Address*/
-	smp_write_ioapic(mc, apicid_8111, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, apicid_8111, 0x20, IO_APIC_ADDR);
         {
                 device_t dev;
                 struct resource *res;

src/mainboard/ibase/mb899/acpi_tables.c

@@ -21,6 +21,7 @@
 #include <string.h>
 #include <console/console.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <arch/acpigen.h>
 #include <arch/smp/mpspec.h>
 #include <device/device.h>
@@ -86,8 +87,6 @@ static void acpi_create_intel_hpet(acpi_hpet_t * hpet)
 	    acpi_checksum((void *) hpet, sizeof(acpi_hpet_t));
 }
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_madt(unsigned long current)
 {
 	/* Local APICs */

src/mainboard/ibase/mb899/mptable.c

@@ -17,11 +17,11 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-
 #include <device/device.h>
 #include <device/pci.h>
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <string.h>
 #include <stdint.h>
 
@@ -86,7 +86,7 @@ static void *smp_write_config_table(void *v)
 
 	/* I/O APICs:	APIC ID	Version	State		Address */
 	ioapic_id = 2;
-	smp_write_ioapic(mc, ioapic_id, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, ioapic_id, 0x20, IO_APIC_ADDR);
 
 	/* Legacy Interrupts */
 

src/mainboard/ibm/e325/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -81,7 +82,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, bus_isa, "ISA	  ");
 
 	/* Legacy IOAPIC #2 */
-	smp_write_ioapic(mc, 2, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
 	{
 		device_t dev;
 		struct resource *res;

src/mainboard/ibm/e326/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -80,7 +81,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, bus_isa, "ISA	  ");
 
 	/* Legacy IOAPIC #2 */
-	smp_write_ioapic(mc, 2, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
 	{
 		device_t dev;
 		struct resource *res;

src/mainboard/iei/kino-780am2-fam10/acpi_tables.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -56,8 +57,6 @@ extern const unsigned char AmlCode_ssdt4[];
 extern const unsigned char AmlCode_ssdt5[];
 #endif
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/intel/d945gclf/acpi_tables.c

@@ -27,6 +27,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
+#include <arch/ioapic.h>
 #include "dmi.h"
 
 #define OLD_ACPI 0
@@ -146,8 +147,6 @@ static void acpi_create_intel_hpet(acpi_hpet_t * hpet)
 	    acpi_checksum((void *) hpet, sizeof(acpi_hpet_t));
 }
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_madt(unsigned long current)
 {
 	/* Local APICs */

src/mainboard/intel/d945gclf/mptable.c

@@ -17,11 +17,11 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-
 #include <device/device.h>
 #include <device/pci.h>
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <string.h>
 #include <stdint.h>
 
@@ -65,7 +65,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, isa_bus, "ISA   ");
 
 	/* I/O APICs:	APIC ID	Version	State		Address */
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
 
 	/* Legacy Interrupts */
 

src/mainboard/intel/eagleheights/acpi_tables.c

@@ -23,6 +23,7 @@
 #include <string.h>
 #include <console/console.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -84,8 +85,6 @@ static void acpi_create_intel_hpet(acpi_hpet_t * hpet)
 
 #define IO_APIC0 2
 #define IO_APIC1 3
-#define IO_APIC0_ADDR	0xfec00000UL
-#define IO_APIC1_ADDR	0xfec10000UL
 
 unsigned long acpi_fill_madt(unsigned long current)
 {
@@ -99,9 +98,9 @@ unsigned long acpi_fill_madt(unsigned long current)
 	current += acpi_create_madt_lapic((acpi_madt_lapic_t *) current, 2, 1);
 
 	/* IOAPIC */
-	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, IO_APIC0, IO_APIC0_ADDR, irq_start);
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, IO_APIC0, IO_APIC_ADDR, irq_start);
 	irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
-	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, IO_APIC1, IO_APIC1_ADDR, irq_start);
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, IO_APIC1, IO_APIC_ADDR + 0x10000, irq_start);
 	irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
 
 	dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));

src/mainboard/intel/eagleheights/mptable.c

@@ -23,6 +23,7 @@
 
 #include <console/console.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci.h>
 #include <string.h>
@@ -144,7 +145,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, bus_isa, "ISA   ");
 
 	/*I/O APICs: APIC ID Version State Address*/
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
 	/*
 	{
 		device_t dev;

src/mainboard/intel/jarrell/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -111,7 +112,7 @@ static void *smp_write_config_table(void *v)
 
 	/* IOAPIC handling */
 
-	smp_write_ioapic(mc, 8, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 8, 0x20, IO_APIC_ADDR);
 	{
 		struct resource *res;
 		device_t dev;

src/mainboard/intel/mtarvon/mptable.c

@@ -22,6 +22,7 @@
 
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -62,7 +63,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, bus_isa, "ISA   ");
 
 	/* IOAPIC handling */
-	smp_write_ioapic(mc, 0x01, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 0x01, 0x20, IO_APIC_ADDR);
 
 	mptable_add_isa_interrupts(mc, bus_isa, 0x1, 0);
 

src/mainboard/intel/truxton/mptable.c

@@ -20,6 +20,7 @@
 
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -95,7 +96,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, bus_isa, "ISA	  ");
 
 	/* IOAPIC handling */
-	smp_write_ioapic(mc, 0x8, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 0x8, 0x20, IO_APIC_ADDR);
 
 	mptable_add_isa_interrupts(mc, bus_isa, 0x8, 0);
 

src/mainboard/intel/xe7501devkit/acpi_tables.c

@@ -8,6 +8,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <assert.h>
@@ -48,7 +49,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 
 
 	// Southbridge IOAPIC
-	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_ICH3, 0xfec00000, irq_start);
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_ICH3, IO_APIC_ADDR, irq_start);
 	irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
 
 	// P64H2#2 Bus A IOAPIC

src/mainboard/intel/xe7501devkit/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -37,7 +38,7 @@ static void xe7501devkit_register_ioapics(struct mp_config_table *mc)
 	// TODO: Gack. This is REALLY ugly.
 
 	// Southbridge IOAPIC
-	smp_write_ioapic(mc, IOAPIC_ICH3, 0x20, 0xfec00000);	// APIC ID, Version, Address
+	smp_write_ioapic(mc, IOAPIC_ICH3, 0x20, IO_APIC_ADDR);	// APIC ID, Version, Address
 
 	// P64H2#2 Bus A IOAPIC
 	dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));

src/mainboard/iwill/dk8_htx/acpi_tables.c

@@ -11,13 +11,13 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/amdk8_sysconf.h>
 #include "northbridge/amd/amdk8/amdk8_acpi.h"
-
 #include "mb_sysconf.h"
 
 #define DUMP_ACPI_TABLES 0
@@ -47,8 +47,6 @@ extern const unsigned char AmlCode_ssdt4[];
 extern const unsigned char AmlCode_ssdt5[];
 #endif
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/iwill/dk8_htx/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -54,7 +55,7 @@ static void *smp_write_config_table(void *v)
         smp_write_bus(mc, m->bus_isa, "ISA   ");
 
 /*I/O APICs:	APIC ID	Version	State		Address*/
-	smp_write_ioapic(mc, m->apicid_8111, 0x11, 0xfec00000); //8111
+	smp_write_ioapic(mc, m->apicid_8111, 0x11, IO_APIC_ADDR); //8111
         {
                 device_t dev;
 		struct resource *res;

src/mainboard/iwill/dk8s2/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -82,7 +83,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, bus_isa, "ISA	  ");
 
 	/* IOAPIC handling */
-	smp_write_ioapic(mc, 2, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
 	{
 		device_t dev;
 		struct resource *res;

src/mainboard/iwill/dk8x/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -82,7 +83,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, bus_isa, "ISA	  ");
 
 	/* IOAPIC handling */
-	smp_write_ioapic(mc, 2, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
 	{
 		device_t dev;
 		struct resource *res;

src/mainboard/jetway/pa78vm5/acpi_tables.c

@@ -21,6 +21,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -55,8 +56,6 @@ extern const unsigned char AmlCode_ssdt4[];
 extern const unsigned char AmlCode_ssdt5[];
 #endif
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/kontron/986lcd-m/acpi_tables.c

@@ -21,6 +21,7 @@
 #include <string.h>
 #include <console/console.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <arch/acpigen.h>
 #include <arch/smp/mpspec.h>
 #include <device/device.h>
@@ -86,8 +87,6 @@ static void acpi_create_intel_hpet(acpi_hpet_t * hpet)
 	    acpi_checksum((void *) hpet, sizeof(acpi_hpet_t));
 }
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_madt(unsigned long current)
 {
 	/* Local APICs */

src/mainboard/kontron/986lcd-m/mptable.c

@@ -17,11 +17,11 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-
 #include <device/device.h>
 #include <device/pci.h>
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <string.h>
 #include <stdint.h>
 
@@ -72,7 +72,7 @@ static void *smp_write_config_table(void *v)
 
 	/* I/O APICs:	APIC ID	Version	State		Address */
 	ioapic_id = 2;
-	smp_write_ioapic(mc, ioapic_id, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, ioapic_id, 0x20, IO_APIC_ADDR);
 
 	/* Legacy Interrupts */
 	mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0);

src/mainboard/kontron/kt690/acpi_tables.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -59,8 +60,6 @@ static void dump_mem(u32 start, u32 end)
 
 extern const unsigned char AmlCode[];
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/newisys/khepri/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -83,7 +84,7 @@ static void *smp_write_config_table(void *v)
 
 	/* IOAPIC handling */
 
-	smp_write_ioapic(mc, 2, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
 	{
 		device_t dev;
 		struct resource *res;

src/mainboard/roda/rk886ex/acpi_tables.c

@@ -22,6 +22,7 @@
 #include <string.h>
 #include <console/console.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <arch/smp/mpspec.h>
@@ -142,10 +143,6 @@ static void acpi_create_intel_hpet(acpi_hpet_t * hpet)
 	    acpi_checksum((void *) hpet, sizeof(acpi_hpet_t));
 }
 
-
-
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_madt(unsigned long current)
 {
 	/* Local APICs */

src/mainboard/roda/rk886ex/mptable.c

@@ -19,11 +19,11 @@
  * MA 02110-1301 USA
  */
 
-
 #include <device/device.h>
 #include <device/pci.h>
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <string.h>
 #include <stdint.h>
 
@@ -67,7 +67,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_bus(mc, isa_bus, "ISA   ");
 
 	/* I/O APICs:	APIC ID	Version	State		Address */
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
 
 	/* Legacy Interrupts */
 	mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);

src/mainboard/supermicro/x6dai_g/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -58,8 +59,8 @@ static void *smp_write_config_table(void *v)
 
 	/* IOAPIC handling */
 
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
-	smp_write_ioapic(mc, 3, 0x20, 0xfec10000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+	smp_write_ioapic(mc, 3, 0x20, IO_APIC_ADDR + 0x10000);
 
 	mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
 

src/mainboard/supermicro/x6dhe_g/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -84,8 +85,8 @@ static void *smp_write_config_table(void *v)
 
 	/* IOAPIC handling */
 
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
-	smp_write_ioapic(mc, 3, 0x20, 0xfec10000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+	smp_write_ioapic(mc, 3, 0x20, IO_APIC_ADDR + 0x10000);
 	{
 	    	struct resource *res;
 		device_t dev;

src/mainboard/supermicro/x6dhe_g2/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -84,8 +85,8 @@ static void *smp_write_config_table(void *v)
 
 	/* IOAPIC handling */
 
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
-	smp_write_ioapic(mc, 3, 0x20, 0xfec10000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+	smp_write_ioapic(mc, 3, 0x20, IO_APIC_ADDR + 0x10000);
 	{
 	    	struct resource *res;
 		device_t dev;

src/mainboard/supermicro/x6dhr_ig/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -109,7 +110,7 @@ static void *smp_write_config_table(void *v)
 
 	/* IOAPIC handling */
 
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
 	{
 		struct resource *res;
 		device_t dev;

src/mainboard/supermicro/x6dhr_ig2/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -109,7 +110,7 @@ static void *smp_write_config_table(void *v)
 
 	/* IOAPIC handling */
 
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
 	{
 		struct resource *res;
 		device_t dev;

src/mainboard/technexion/tim5690/acpi_tables.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -59,8 +60,6 @@ static void dump_mem(u32 start, u32 end)
 
 extern const unsigned char AmlCode[];
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/technexion/tim8690/acpi_tables.c

@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -59,8 +60,6 @@ static void dump_mem(u32 start, u32 end)
 
 extern const unsigned char AmlCode[];
 
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
 	/* Just a dummy */

src/mainboard/tyan/s2735/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -32,7 +33,7 @@ static void *smp_write_config_table(void *v)
         smp_write_processors(mc);
 	mptable_write_buses(mc, NULL, &isa_bus);
 /*I/O APICs:	APIC ID	Version	State		Address*/
-	smp_write_ioapic(mc, 8, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 8, 0x20, IO_APIC_ADDR);
 	{
                 device_t dev;
                 struct resource *res;

src/mainboard/tyan/s2850/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -105,7 +106,7 @@ static void *smp_write_config_table(void *v)
 #endif
         apicid_8111 = apicid_base+0;
 
-	smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
 
 	mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0);
 

src/mainboard/tyan/s2875/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -120,7 +121,7 @@ static void *smp_write_config_table(void *v)
         apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
         apicid_8111 = apicid_base+0;
-	smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
 
 	mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0);
 

src/mainboard/tyan/s2880/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -135,7 +136,7 @@ static void *smp_write_config_table(void *v)
         apicid_8111 = apicid_base+0;
         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
-	smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
         {
 
                 device_t dev;

src/mainboard/tyan/s2881/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -62,7 +63,7 @@ static void *smp_write_config_table(void *v)
 
 
 /*I/O APICs:	APIC ID	Version	State		Address*/
-	smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
         {
                 device_t dev;
                 struct resource *res;

src/mainboard/tyan/s2882/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <string.h>
@@ -143,7 +144,7 @@ static void *smp_write_config_table(void *v)
         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
 
-	smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
         {
                 device_t dev;
                 struct resource *res;

src/mainboard/tyan/s2885/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -64,7 +65,7 @@ static void *smp_write_config_table(void *v)
         smp_write_bus(mc, bus_isa, "ISA   ");
 
 /*I/O APICs:	APIC ID	Version	State		Address*/
-	smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000); //8111
+	smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR); //8111
         {
                 device_t dev;
 		struct resource *res;

src/mainboard/tyan/s4880/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -135,7 +136,7 @@ static void *smp_write_config_table(void *v)
         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
 
-	smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
         {
                 device_t dev;
                 struct resource *res;

src/mainboard/tyan/s4882/mptable.c

@@ -1,5 +1,6 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -135,7 +136,7 @@ static void *smp_write_config_table(void *v)
         apicid_8111 = apicid_base+0;
         apicid_8131_1 = apicid_base+1;
         apicid_8131_2 = apicid_base+2;
-	smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
+	smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
         {
                 device_t dev;
                 struct resource *res;

src/mainboard/via/epia-n/acpi_tables.c

@@ -30,6 +30,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -94,7 +95,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 
 	/* Write SB IOAPIC. */
 	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
-				   VT8237R_APIC_ID, VT8237R_APIC_BASE, gsi_base);
+				   VT8237R_APIC_ID, IO_APIC_ADDR, gsi_base);
 
 	/* IRQ0 -> APIC IRQ2. */
 	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)

src/mainboard/via/epia-n/mainboard.c

@@ -23,6 +23,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <boot/tables.h>
+#include <arch/ioapic.h>
 #include <southbridge/via/vt8237r/vt8237r.h>
 #include "chip.h"
 
@@ -30,7 +31,7 @@ int add_mainboard_resources(struct lb_memory *mem)
 {
 #if CONFIG_IOAPIC == 1
 	lb_add_memory_range(mem, LB_MEM_RESERVED,
-		VT8237R_APIC_BASE, 0x1000);
+		IO_APIC_ADDR, 0x1000);
 	lb_add_memory_range(mem, LB_MEM_RESERVED,
 		0xFEE00000ULL, 0x1000);
 	lb_add_memory_range(mem, LB_MEM_RESERVED,

src/mainboard/via/epia-n/mptable.c

@@ -2,6 +2,7 @@
 /* as modified by RGM for coreboot */
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -35,7 +36,7 @@ static void *smp_write_config_table(void *v)
         mptable_write_buses(mc, NULL, &isa_bus);
 
 /*I/O APICs:	APIC ID	Version	State		Address*/
-	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
+	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
 	{
 		device_t dev;
 		struct resource *res;

src/mainboard/via/pc2500e/mptable.c

@@ -24,6 +24,7 @@
 
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -59,7 +60,7 @@ static void *smp_write_config_table(void *v)
 	mptable_write_buses(mc, NULL, &isa_bus);
 
 /* I/O APICs:	APIC ID	Version	State		Address*/
-	smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, VT8237R_APIC_BASE);
+	smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, IO_APIC_ADDR);
 
 	/* Now, assemble the table. */
 	mptable_add_isa_interrupts(mc, isa_bus, VT8237R_APIC_ID, 0);

src/mainboard/via/vt8454c/acpi_tables.c

@@ -22,6 +22,7 @@
 #include <string.h>
 #include <console/console.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -85,10 +86,6 @@ static void acpi_create_via_hpet(acpi_hpet_t * hpet)
 	    acpi_checksum((void *) hpet, sizeof(acpi_hpet_t));
 }
 
-
-
-#define IO_APIC_ADDR	0xfec00000UL
-
 unsigned long acpi_fill_madt(unsigned long current)
 {
 	/* Local Apic */

src/mainboard/via/vt8454c/mptable.c

@@ -22,6 +22,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <string.h>
@@ -56,7 +57,7 @@ static void *smp_write_config_table(void *v)
 	mptable_write_buses(mc, NULL, &isa_bus);
 
 	/* I/O APICs:   APIC ID Version State Address */
-	smp_write_ioapic(mc, 2, 17, 0xfec00000);
+	smp_write_ioapic(mc, 2, 17, IO_APIC_ADDR);
 
 	mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
 

src/northbridge/via/cx700/cx700_lpc.c

@@ -19,17 +19,14 @@
 
 #include <arch/io.h>
 #include <console/console.h>
-
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
-
 #include <pc80/mc146818rtc.h>
 #include <pc80/i8259.h>
 #include <pc80/keyboard.h>
 #include <pc80/isa-dma.h>
-
 #include <cpu/x86/lapic.h>
 #include <arch/ioapic.h>
 #include <stdlib.h>
@@ -253,7 +250,7 @@ static void cx700_read_resources(device_t dev)
 	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/northbridge/via/vx800/vx800.h

@@ -120,7 +120,6 @@ void enable_vx800_serial(void);
 #define SB_EHCI_REG 0,0x10, 4,
 
 #define VX800SB_APIC_ID			0x4
-#define VX800SB_APIC_BASE		0xfec00000ULL
 #define VX800SB_APIC_DATA_OFFSET             0x10
 #define VX800SB_APIC_ENTRY_NUMBER 0x40
 

src/southbridge/amd/amd8111/amd8111_lpc.c

@@ -101,7 +101,7 @@ static void amd8111_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/amd/cs5530/cs5530_isa.c

@@ -20,6 +20,7 @@
 
 #include <console/console.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -38,7 +39,7 @@ static void cs5530_read_resources(device_t dev)
 	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/amd/cs5535/cs5535.c

@@ -1,5 +1,6 @@
 
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ops.h>
@@ -82,7 +83,7 @@ static void cs5535_read_resources(device_t dev)
 	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/amd/cs5536/cs5536.c

@@ -18,6 +18,7 @@
  */
 
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ops.h>
@@ -656,7 +657,7 @@ static void cs5536_read_resources(device_t dev)
 	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/amd/sb600/sb600_lpc.c

@@ -27,6 +27,7 @@
 #include <pc80/isa-dma.h>
 #include <bitops.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include "sb600.h"
 
 static void lpc_init(device_t dev)
@@ -84,7 +85,7 @@ static void sb600_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 

src/southbridge/amd/sb600/sb600_sm.c

@@ -302,7 +302,7 @@ static void sb600_sm_read_resources(device_t dev)
 
 	/* apic */
 	res = new_resource(dev, 0x74);
-	res->base  = 0xfec00000;
+	res->base  = IO_APIC_ADDR;
 	res->size = 256 * 0x10;
 	res->limit = 0xFFFFFFFFUL;	/* res->base + res->size -1; */
 	res->align = 8;

src/southbridge/amd/sb700/sb700_lpc.c

@@ -27,6 +27,7 @@
 #include <pc80/isa-dma.h>
 #include <bitops.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include "sb700.h"
 
 static void lpc_init(device_t dev)
@@ -87,7 +88,7 @@ static void sb700_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 

src/southbridge/amd/sb700/sb700_sm.c

@@ -308,7 +308,7 @@ static void sb700_sm_read_resources(device_t dev)
 
 	/* apic */
 	res = new_resource(dev, 0x74);
-	res->base  = 0xfec00000;
+	res->base  = IO_APIC_ADDR;
 	res->size = 256 * 0x10;
 	res->limit = 0xFFFFFFFFUL;	/* res->base + res->size -1; */
 	res->align = 8;

src/southbridge/broadcom/bcm5785/bcm5785_lpc.c

@@ -13,6 +13,7 @@
 #include <pc80/isa-dma.h>
 #include <bitops.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include "bcm5785.h"
 
 static void lpc_init(device_t dev)
@@ -47,7 +48,7 @@ static void bcm5785_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/intel/esb6300/esb6300_lpc.c

@@ -242,7 +242,7 @@ static void lpc_init(struct device *dev)
 	value |= (1 << 8)|(1<<7);
 	value |= (6 << 0)|(1<<13)|(1<<11);
 	pci_write_config32(dev, 0xd0, value);
-	setup_ioapic(0xfec00000, 0); // don't rename IO APIC ID
+	setup_ioapic(IO_APIC_ADDR, 0); // don't rename IO APIC ID
 
 	/* disable reset timer */
 	pci_write_config8(dev, 0xd4, 0x02);
@@ -330,7 +330,7 @@ static void esb6300_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/intel/esb6300/esb6300_pic.c

@@ -23,7 +23,7 @@ static void pic_init(struct device *dev)
 	pci_write_config8(dev, 0x3c, 0xff);
 
 	/* Setup the ioapic */
-	clear_ioapic(0xfec10000);
+	clear_ioapic(IO_APIC_ADDR + 0x10000);
 }
 
 static void pic_read_resources(device_t dev)
@@ -35,7 +35,7 @@ static void pic_read_resources(device_t dev)
 
 	/* Report the pic1 mbar resource */
 	res = new_resource(dev, 0x44);
-	res->base  = 0xfec10000;
+	res->base  = IO_APIC_ADDR + 0x10000;
 	res->size  = 256;
 	res->limit = res->base + res->size -1;
 	res->align = 8;

src/southbridge/intel/i3100/i3100_lpc.c

@@ -372,7 +372,7 @@ static void i3100_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 

src/southbridge/intel/i82371eb/i82371eb_isa.c

@@ -25,6 +25,7 @@
 #include <device/pci_ids.h>
 #include <pc80/isa-dma.h>
 #include <pc80/mc146818rtc.h>
+#include <arch/ioapic.h>
 #include "i82371eb.h"
 
 static void isa_init(struct device *dev)
@@ -64,7 +65,7 @@ static void sb_read_resources(struct device *dev)
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/intel/i82801ax/i82801ax_lpc.c

@@ -28,6 +28,7 @@
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include "i82801ax.h"
 
 #define GPIO_BASE_ADDR	0x00000500 /* GPIO Base Address Register */
@@ -72,8 +73,8 @@ typedef struct southbridge_intel_i82801ax_config config_t;
 static void i82801ax_enable_apic(struct device *dev)
 {
 	u32 reg32;
-	volatile u32 *ioapic_index = (volatile u32 *)0xfec00000;
-	volatile u32 *ioapic_data = (volatile u32 *)0xfec00010;
+	volatile u32 *ioapic_index = (volatile u32 *)IO_APIC_ADDR;
+	volatile u32 *ioapic_data = (volatile u32 *)(IO_APIC_ADDR + 0x10);
 
 	/* Set ACPI base address (I/O space). */
 	pci_write_config32(dev, PMBASE, (PMBASE_ADDR | 1));
@@ -266,7 +267,7 @@ static void i82801ax_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/intel/i82801bx/i82801bx_lpc.c

@@ -28,6 +28,7 @@
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include "i82801bx.h"
 
 #define NMI_OFF 0
@@ -74,8 +75,8 @@ typedef struct southbridge_intel_i82801bx_config config_t;
 static void i82801bx_enable_apic(struct device *dev)
 {
 	uint32_t reg32;
-	volatile uint32_t *ioapic_index = (volatile uint32_t *)0xfec00000;
-	volatile uint32_t *ioapic_data = (volatile uint32_t *)0xfec00010;
+	volatile uint32_t *ioapic_index = (volatile uint32_t *)IO_APIC_ADDR;
+	volatile uint32_t *ioapic_data = (volatile uint32_t *)(IO_APIC_ADDR + 0x10);
 
 	/* Set ACPI base address (I/O space). */
 	pci_write_config32(dev, PMBASE, (PMBASE_ADDR | 1));
@@ -284,7 +285,7 @@ static void i82801bx_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/intel/i82801cx/i82801cx_lpc.c

@@ -11,6 +11,7 @@
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include "i82801cx.h"
 
 #define NMI_OFF 0
@@ -26,8 +27,8 @@
 static void i82801cx_enable_ioapic( struct device *dev)
 {
 	uint32_t dword;
-    volatile uint32_t* ioapic_index = (volatile uint32_t*)0xfec00000;
-    volatile uint32_t* ioapic_data = (volatile uint32_t*)0xfec00010;
+    volatile uint32_t* ioapic_index = (volatile uint32_t*)IO_APIC_ADDR;
+    volatile uint32_t* ioapic_data = (volatile uint32_t*)(IO_APIC_ADDR + 0x10);
 
     dword = pci_read_config32(dev, GEN_CNTL);
     dword |= (3 << 7); /* enable ioapic & disable SMBus interrupts */
@@ -224,7 +225,7 @@ static void i82801cx_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/intel/i82801dx/i82801dx.h

@@ -36,8 +36,6 @@
 extern void i82801dx_enable(device_t dev);
 #endif
 
-#define IO_APIC_ADDR		0xfec00000
-
 /*
  * HPET Memory Address Range. Possible values:
  * 0xfed00000 for FED0_0000h - FED0_03FFh

src/southbridge/intel/i82801dx/i82801dx_lpc.c

@@ -29,6 +29,7 @@
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include "i82801dx.h"
 
 #define NMI_OFF 0
@@ -317,7 +318,7 @@ static void i82801dx_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/intel/i82801ex/i82801ex_lpc.c

@@ -314,7 +314,7 @@ static void i82801ex_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/intel/i82801gx/i82801gx.h

@@ -32,7 +32,6 @@
 #define DEFAULT_GPIOBASE	0x0480
 #define DEFAULT_PMBASE		0x0500
 
-#define IO_APIC_ADDR		0xfec00000
 #define HPET_ADDR		0xfed00000
 #define DEFAULT_RCBA		0xfed1c000
 

src/southbridge/intel/i82801gx/i82801gx_lpc.c

@@ -26,6 +26,7 @@
 #include <pc80/isa-dma.h>
 #include <pc80/i8259.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include "i82801gx.h"
 
 #define NMI_OFF	0
@@ -476,7 +477,7 @@ static void i82801gx_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/nvidia/ck804/ck804_lpc.c

@@ -211,7 +211,7 @@ static void ck804_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/nvidia/mcp55/mcp55_lpc.c

@@ -185,7 +185,7 @@ static void mcp55_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/sis/sis966/sis966_lpc.c

@@ -178,7 +178,7 @@ static void sis966_lpc_read_resources(device_t dev)
 		     IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }

src/southbridge/via/vt8231/vt8231_lpc.c

@@ -3,9 +3,8 @@
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
-
 #include <pc80/mc146818rtc.h>
-
+#include <arch/ioapic.h>
 #include "chip.h"
 
 /* PIRQ init
@@ -141,7 +140,7 @@ static void vt8231_read_resources(device_t dev)
 	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
 	res = new_resource(dev, 3); /* IOAPIC */
-	res->base = 0xfec00000;
+	res->base = IO_APIC_ADDR;
 	res->size = 0x00001000;
 	res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }