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mb/google/volteer: Fix eldrid DPTF's passive and critical policies

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Because the entries were formatted differently to the baseboard, the
devicetree overrides didn't work as intended, and all 5 entries from
the baseboard were included, and then the overrides were applied, but
the baseboard's entries were kept, so there were duplicate ACPI
entries, which causes errors when parsing the table.

Fixes: 5f30ae3714 ("mb/google/volteer: update thermal table for Eldrid")
BUG=b:181034399
TEST=compile, verify static.c is correct now

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I32fe2eae591ed4d3c08378977c463327f7ee1100
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51044
Reviewed-by: YH Lin <yueherngl@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nick Chen <nick_xr_chen@wistron.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tim Wawrzynczak 2021-02-23 13:11:36 -07:00
parent 59881a62c1
commit 74dfbd09fe
1 changed files with 6 additions and 4 deletions
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10
src/mainboard/google/volteer/variants/eldrid/overridetree.cb
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@ -100,12 +100,14 @@ chip soc/intel/tigerlake
register "policies.active" = "{[0] = {.target=DPTF_NONE}}"
## Passive Policy
register "policies.passive[0]" = "DPTF_PASSIVE(CPU,CPU,87,5000)"
register "policies.passive[1]" = "DPTF_PASSIVE(CPU,TEMP_SENSOR_2,60.8,6000)"
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU,CPU,87,5000),
[1] = DPTF_PASSIVE(CPU,TEMP_SENSOR_2,60.8,6000)}"
## Critical Policy
register "policies.critical[0]" = "DPTF_CRITICAL(CPU,100,SHUTDOWN)"
register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_2,75,SHUTDOWN)"
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU,100,SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_2,75,SHUTDOWN)}"
## Power Limits Control
# 3-15W PL1 in 200mW increments, avg over 26-34s interval