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mb/google/poppy: Implement touchscreen,digitizer power sequencing 

For touchscreens/digitizers on poppy variants, drive the enable
GPIO high and hold in reset in romstage, then release from reset in
ramstage. This will allow coreboot to detect the presence of i2c
touchscreens/digitizers during ACPI SSDT generation (enabled in a
subsequent commit).

TEST=tested with the rest of patch train

Change-Id: I90ac4f09c343a28328f7d30254f0448cbe0c78b3
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70919
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
This commit is contained in:
Matt DeVillier 2022-12-22 21:44:14 -06:00 committed by Martin L Roth
parent 9d40a0be2f
commit 74edda99dd
7 changed files with 75 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
src/mainboard/google/poppy/variants/atlas/gpio.c
View File

@ -141,7 +141,7 @@ static const struct pad_config gpio_table[] = {
/* C21 : UART2_TXD ==> PCHTX_SERVORX_UART */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
/* C22 : UART2_RTS# ==> EN_PP3300_DX_TOUCHSCREEN */
PAD_CFG_GPO(GPP_C22, 0, DEEP),
PAD_CFG_GPO(GPP_C22, 1, DEEP),
/* C23 : UART2_CTS# ==> PCH_WP */
PAD_CFG_GPI_GPIO_DRIVER(GPP_C23, UP_20K, DEEP),
@ -213,7 +213,7 @@ static const struct pad_config gpio_table[] = {
/* E10 : USB2_OC1# ==> USB_C1_OC_ODL */
PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),
/* E11 : USB2_OC2# ==> TOUCHSCREEN_RESET_L */
PAD_CFG_GPO(GPP_E11, 0, DEEP),
PAD_CFG_GPO(GPP_E11, 1, DEEP),
/* E12 : USB2_OC3# ==> NC */
PAD_NC(GPP_E12, NONE),
/* E13 : DDPB_HPD0 ==> USB_C1_DP_HPD */
@ -418,3 +418,17 @@ const struct pad_config *variant_sku_gpio_table(size_t *num)
}
return board_gpio_tables;
}
static const struct pad_config romstage_gpio_table[] = {
/* Enable touchscreen, hold in reset */
/* C22 : UART2_RTS# ==> EN_PP3300_DX_TOUCHSCREEN */
PAD_CFG_GPO(GPP_C22, 1, DEEP),
/* E11 : USB2_OC2# ==> TOUCHSCREEN_RESET_L */
PAD_CFG_GPO(GPP_E11, 0, DEEP),
};
const struct pad_config *variant_romstage_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(romstage_gpio_table);
return romstage_gpio_table;
}

16
src/mainboard/google/poppy/variants/baseboard/gpio.c
View File

@ -144,7 +144,7 @@ static const struct pad_config gpio_table[] = {
/* C21 : UART2_TXD ==> PCHTX_SERVORX_UART */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
/* C22 : UART2_RTS# ==> EN_PP3300_DX_TOUCHSCREEN */
PAD_CFG_GPO(GPP_C22, 0, DEEP),
PAD_CFG_GPO(GPP_C22, 1, DEEP),
/* C23 : UART2_CTS# ==> PCH_WP */
PAD_CFG_GPI_GPIO_DRIVER(GPP_C23, UP_20K, DEEP),
@ -204,7 +204,7 @@ static const struct pad_config gpio_table[] = {
/* E2 : SATAXPCIE2 ==> NC */
PAD_NC(GPP_E2, NONE),
/* E3 : CPU_GP0 ==> TOUCHSCREEN_RST_L */
PAD_CFG_GPO(GPP_E3, 0, DEEP),
PAD_CFG_GPO(GPP_E3, 1, DEEP),
/* E4 : SATA_DEVSLP0 ==> NC */
PAD_NC(GPP_E4, NONE),
/* E5 : SATA_DEVSLP1 ==> NC */
@ -390,8 +390,16 @@ static const struct cros_gpio cros_gpios[] = {
DECLARE_WEAK_CROS_GPIOS(cros_gpios);
static const struct pad_config romstage_gpio_table[] = {
/* Enable touchscreen, hold in reset */
/* C22 : UART2_RTS# ==> EN_PP3300_DX_TOUCHSCREEN */
PAD_CFG_GPO(GPP_C22, 1, DEEP),
/* E3 : CPU_GP0 ==> TOUCHSCREEN_RST_L */
PAD_CFG_GPO(GPP_E3, 0, DEEP),
};
const struct pad_config * __weak variant_romstage_gpio_table(size_t *num)
{
*num = 0;
return NULL;
*num = ARRAY_SIZE(romstage_gpio_table);
return romstage_gpio_table;
}

19
src/mainboard/google/poppy/variants/nami/gpio.c
View File

@ -57,9 +57,9 @@ static const struct pad_config gpio_table[] = {
/* B2 : VRALERT# ==> NC */
PAD_NC(GPP_B2, NONE),
/* B3 : CPU_GP2 ==> TOUCHSCREEN_RST# */
PAD_CFG_GPO(GPP_B3, 0, DEEP),
PAD_CFG_GPO(GPP_B3, 1, DEEP),
/* B4 : CPU_GP3 ==> EN_PP3300_DX_TOUCHSCREEN */
PAD_CFG_GPO(GPP_B4, 0, DEEP),
PAD_CFG_GPO(GPP_B4, 1, DEEP),
/* B5 : SRCCLKREQ0# ==> NC */
PAD_NC(GPP_B5, NONE),
/* B6 : SRCCLKREQ1# ==> CLKREQ_PCIE#1 */
@ -478,3 +478,18 @@ const struct pad_config *variant_sku_gpio_table(size_t *num)
}
return board_gpio_tables;
}
static const struct pad_config romstage_gpio_table[] = {
/* Enable touchscreen, hold in reset */
/* B4 : CPU_GP3 ==> EN_PP3300_DX_TOUCHSCREEN */
PAD_CFG_GPO(GPP_B4, 1, DEEP),
/* B3 : CPU_GP2 ==> TOUCHSCREEN_RST# */
PAD_CFG_GPO(GPP_B3, 0, DEEP),
};
const struct pad_config *variant_romstage_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(romstage_gpio_table);
return romstage_gpio_table;
}

12
src/mainboard/google/poppy/variants/nautilus/gpio.c
View File

@ -116,7 +116,7 @@ static const struct pad_config gpio_table[] = {
/* C8 : UART0_RXD ==> CHP3_P3.3V_DX_WFCAM_EN */
PAD_CFG_GPO(GPP_C8, 0, DEEP),
/* C9 : UART0_TXD ==> CHP3_P3.3V_DX_DIG_EN */
PAD_CFG_GPO(GPP_C9, 0, DEEP),
PAD_CFG_GPO(GPP_C9, 1, DEEP),
/* C10 : UART0_RTS# ==> CHP3_CAM_PMIC_RST_L */
PAD_CFG_GPO(GPP_C10, 1, DEEP),
/* C11 : UART0_CTS# ==> CHP3_P3.3V_DX_UFCAM_EN */
@ -141,8 +141,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
/* C21 : UART2_TXD ==> CHP3_TX_SERVO_RX_UART */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
/* C22 : UART2_RTS# ==> CHP3_P3.3V_DX_TSP_EN */
PAD_CFG_GPO(GPP_C22, 0, DEEP),
/* C22 : UART2_RTS# ==> EN_PP3300_DX_TOUCHSCREEN */
PAD_CFG_GPO(GPP_C22, 1, DEEP),
/* C23 : UART2_CTS# ==> CHP3_PCH_WP*/
PAD_CFG_GPI(GPP_C23, UP_20K, DEEP),
@ -408,6 +408,12 @@ const struct pad_config *variant_sku_gpio_table(size_t *num)
}
static const struct pad_config romstage_gpio_table[] = {
/* Enable touchscreen and digitizer */
/* C22 : UART2_RTS# ==> EN_PP3300_DX_TOUCHSCREEN */
PAD_CFG_GPO(GPP_C22, 1, DEEP),
/* C9 : UART0_TXD ==> CHP3_P3.3V_DX_DIG_EN */
PAD_CFG_GPO(GPP_C9, 1, DEEP),
/* E22 : DDPD_CTRLCLK ==> CHP1_CABC */
PAD_CFG_GPO(GPP_E22, 1, DEEP),
};

18
src/mainboard/google/poppy/variants/nocturne/gpio.c
View File

@ -144,7 +144,7 @@ static const struct pad_config gpio_table[] = {
/* C21 : UART2_TXD ==> PCHTX_SERVORX_UART */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
/* C22 : UART2_RTS# ==> EN_PP3300_DX_TOUCHSCREEN */
PAD_CFG_GPO(GPP_C22, 0, DEEP),
PAD_CFG_GPO(GPP_C22, 1, DEEP),
/* C23 : UART2_CTS# ==> PCH_WP_OD */
PAD_CFG_GPI_GPIO_DRIVER(GPP_C23, UP_20K, DEEP),
@ -220,7 +220,7 @@ static const struct pad_config gpio_table[] = {
/* E10 : USB2_OC1# ==> USB_C1_OC_ODL */
PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),
/* E11 : USB2_OC2# ==> TOUCHSCREEN_RESET_L */
PAD_CFG_GPO(GPP_E11, 0, DEEP),
PAD_CFG_GPO(GPP_E11, 1, DEEP),
/* E12 : USB2_OC3# ==> NC */
PAD_NC(GPP_E12, NONE),
/* E13 : DDPB_HPD0 ==> USB_C1_DP_HPD */
@ -379,3 +379,17 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}
static const struct pad_config romstage_gpio_table[] = {
/* Enable touchscreen, hold in reset */
/* C22 : UART2_RTS# ==> EN_PP3300_DX_TOUCHSCREEN */
PAD_CFG_GPO(GPP_C22, 1, DEEP),
/* E11 : USB2_OC2# ==> TOUCHSCREEN_RESET_L */
PAD_CFG_GPO(GPP_E11, 0, DEEP),
};
const struct pad_config *variant_romstage_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(romstage_gpio_table);
return romstage_gpio_table;
}

6
src/mainboard/google/poppy/variants/rammus/gpio.c
View File

@ -143,7 +143,7 @@ static const struct pad_config gpio_table[] = {
/* C21 : UART2_TXD ==> PCHTX_SERVORX_UART */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
/* C22 : UART2_RTS# ==> EN_PP3300_DX_TOUCHSCREEN */
PAD_CFG_GPO(GPP_C22, 0, DEEP),
PAD_CFG_GPO(GPP_C22, 1, DEEP),
/* C23 : UART2_CTS# ==> PCH_WP */
PAD_CFG_GPI_GPIO_DRIVER(GPP_C23, UP_20K, DEEP),
@ -202,8 +202,8 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_E1, NONE),
/* E2 : SATAXPCIE2 ==> NC */
PAD_NC(GPP_E2, NONE),
/* E3 : CPU_GP0 ==> TOUCHSCREEN I2C OPERATION ENABLE/DISABLE. */
PAD_CFG_GPO(GPP_E3, 0, DEEP),
/* E3 : CPU_GP0 ==> TOUCHSCREEN I2C OPERATION ENABLE. */
PAD_CFG_GPO(GPP_E3, 1, DEEP),
/* E4 : SATA_DEVSLP0 ==> NC */
PAD_NC(GPP_E4, NONE),
/* E5 : SATA_DEVSLP1 ==> NC */

4
src/mainboard/google/poppy/variants/soraka/gpio.c
View File

@ -143,7 +143,7 @@ static const struct pad_config gpio_table[] = {
/* C21 : UART2_TXD ==> PCHTX_SERVORX_UART */
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
/* C22 : UART2_RTS# ==> EN_PP3300_DX_TOUCHSCREEN */
PAD_CFG_GPO(GPP_C22, 0, DEEP),
PAD_CFG_GPO(GPP_C22, 1, DEEP),
/* C23 : UART2_CTS# ==> PCH_WP */
PAD_CFG_GPI_GPIO_DRIVER(GPP_C23, UP_20K, DEEP),
@ -203,7 +203,7 @@ static const struct pad_config gpio_table[] = {
/* E2 : SATAXPCIE2 ==> NC */
PAD_NC(GPP_E2, NONE),
/* E3 : CPU_GP0 ==> TOUCHSCREEN_RST_L */
PAD_CFG_GPO(GPP_E3, 0, DEEP),
PAD_CFG_GPO(GPP_E3, 1, DEEP),
/* E4 : SATA_DEVSLP0 ==> NC */
PAD_NC(GPP_E4, NONE),
/* E5 : SATA_DEVSLP1 ==> NC */