diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h index 6998edd66e..acd5538709 100644 --- a/src/include/acpi/acpi.h +++ b/src/include/acpi/acpi.h @@ -454,11 +454,6 @@ typedef struct acpi_lpi_desc_hdr { } __packed acpi_lpi_desc_hdr_t; #define ACPI_LPIT_CTR_FREQ_TSC 0 -#if defined CONFIG_ACPI_SOC_INTEL_SLP_S0_FREQ_HZ && CONFIG_ACPI_SOC_INTEL_SLP_S0_FREQ_HZ != 0 -#define ACPI_LPIT_SLP_S0_FREQ CONFIG_ACPI_SOC_INTEL_SLP_S0_FREQ_HZ -#else -#define ACPI_LPIT_SLP_S0_FREQ 0 -#endif /* LPIT: Native C-state instruction based LPI structure */ diff --git a/src/soc/intel/common/block/acpi/Kconfig b/src/soc/intel/common/block/acpi/Kconfig index c750e7ebd7..cc7d38fc83 100644 --- a/src/soc/intel/common/block/acpi/Kconfig +++ b/src/soc/intel/common/block/acpi/Kconfig @@ -65,3 +65,13 @@ config SOC_INTEL_UFS_LTR_DISQUALIFY LTR needs to be disqualified for UFS in D3 to ensure PMC ignores LTR from UFS IP which is infinite. endif + +if SOC_INTEL_COMMON_BLOCK_ACPI_LPIT + +config SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ + hex + help + Define the slp_s0_residency frequency to be reported in the + LPIT ACPI table. + +endif diff --git a/src/soc/intel/common/block/acpi/lpit.c b/src/soc/intel/common/block/acpi/lpit.c index de1e71dc24..37ffd7252f 100644 --- a/src/soc/intel/common/block/acpi/lpit.c +++ b/src/soc/intel/common/block/acpi/lpit.c @@ -56,7 +56,8 @@ unsigned long acpi_fill_lpit(unsigned long current) sys_counter->residency_counter.bit_width = 32; sys_counter->residency_counter.space_id = ACPI_ADDRESS_SPACE_MEMORY; sys_counter->residency_counter.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; - sys_counter->counter_frequency = ACPI_LPIT_SLP_S0_FREQ; + sys_counter->counter_frequency = + CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ; /* Min. residency and worst-case latency (from FSP and vendor dumps) */ sys_counter->min_residency = 30000; /* break-even: 30 ms */ diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index 968d1a1d6b..5ae6850884 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -447,8 +447,7 @@ config SOC_INTEL_CSE_FW_PARTITION_CMOS_OFFSET int default 161 -config ACPI_SOC_INTEL_SLP_S0_FREQ_HZ - hex +config SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ default 0x2005 help slp_s0_residency granularity in 122us ticks (i.e. ~8.2KHz) in Meteor Lake.