RS780: print the vgainfo

With this commit the vgainfo is printed and looks like that on the serial console:
vgainfo:
  ulBootUpEngineClock:50000
  ulBootUpUMAClock:66700
  ulBootUpSidePortClock:0
  ulMinSidePortClock:0
  ulSystemConfig:0
  ulBootUpReqDisplayVector:0
  ulOtherDisplayMisc:0
  ulDDISlot1Config:0
  ulDDISlot2Config:0
  ucMemoryType:0
  ucUMAChannelNumber:1
  ucDockingPinBit:0
  ucDockingPinPolarity:0
  ulDockingPinCFGInfo:0
  ulCPUCapInfo: 2
  usNumberOfCyclesInPeriod:0
  usMaxNBVoltage:0
  usMinNBVoltage:0
  usBootUpNBVoltage:0
  ulHTLinkFreq:20000
  usMinHTLinkWidth:8
  usMaxHTLinkWidth:8
  usUMASyncStartDelay:100
  usUMADataReturnTime:300
  usLinkStatusZeroTime:600
  ulHighVoltageHTLinkFreq:20000
  ulLowVoltageHTLinkFreq:20000
  usMaxUpStreamHTLinkWidth:8
  usMaxDownStreamHTLinkWidth:8
  usMinUpStreamHTLinkWidth:8
  usMinDownStreamHTLinkWidth:8

Change-Id: I17c2a13ab52a0f78588f812d4f42f45f9a7b7524
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: http://review.coreboot.org/456
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Denis 'GNUtoo' Carikli 2011-11-27 13:43:16 +01:00 committed by Patrick Georgi
parent 6cdf5a9e2e
commit 7519d77f72
1 changed files with 80 additions and 0 deletions

View File

@ -575,6 +575,86 @@ static void internal_gfx_pci_dev_init(struct device *dev)
/* Poweron DDI Lanes */ /* Poweron DDI Lanes */
poweron_ddi_lanes(nb_dev); poweron_ddi_lanes(nb_dev);
printk(BIOS_DEBUG,"vgainfo:\n"
" ulBootUpEngineClock:%lu \n"
" ulBootUpUMAClock:%lu \n"
" ulBootUpSidePortClock:%lu \n"
" ulMinSidePortClock:%lu \n"
" ulSystemConfig:%lu \n"
" ulBootUpReqDisplayVector:%lu \n"
" ulOtherDisplayMisc:%lu \n"
" ulDDISlot1Config:%lu \n"
" ulDDISlot2Config:%lu \n"
" ucMemoryType:%u \n"
" ucUMAChannelNumber:%u \n"
" ucDockingPinBit:%u \n"
" ucDockingPinPolarity:%u \n"
" ulDockingPinCFGInfo:%lu \n"
" ulCPUCapInfo: %lu \n"
" usNumberOfCyclesInPeriod:%hu \n"
" usMaxNBVoltage:%hu \n"
" usMinNBVoltage:%hu \n"
" usBootUpNBVoltage:%hu \n"
" ulHTLinkFreq:%lu \n"
" usMinHTLinkWidth:%hu \n"
" usMaxHTLinkWidth:%hu \n"
" usUMASyncStartDelay:%hu \n"
" usUMADataReturnTime:%hu \n"
" usLinkStatusZeroTime:%hu \n"
" ulHighVoltageHTLinkFreq:%lu \n"
" ulLowVoltageHTLinkFreq:%lu \n"
" usMaxUpStreamHTLinkWidth:%hu \n"
" usMaxDownStreamHTLinkWidth:%hu \n"
" usMinUpStreamHTLinkWidth:%hu \n"
" usMinDownStreamHTLinkWidth:%hu \n",
(unsigned long)vgainfo.ulBootUpEngineClock,
(unsigned long)vgainfo.ulBootUpUMAClock,
(unsigned long)vgainfo.ulBootUpSidePortClock,
(unsigned long)vgainfo.ulMinSidePortClock,
(unsigned long)vgainfo.ulSystemConfig,
(unsigned long)vgainfo.ulBootUpReqDisplayVector,
(unsigned long)vgainfo.ulOtherDisplayMisc,
(unsigned long)vgainfo.ulDDISlot1Config,
(unsigned long)vgainfo.ulDDISlot2Config,
vgainfo.ucMemoryType,
vgainfo.ucUMAChannelNumber,
vgainfo.ucDockingPinBit,
vgainfo.ucDockingPinPolarity,
(unsigned long)vgainfo.ulDockingPinCFGInfo,
(unsigned long)vgainfo.ulCPUCapInfo,
vgainfo.usNumberOfCyclesInPeriod,
vgainfo.usMaxNBVoltage,
vgainfo.usMinNBVoltage,
vgainfo.usBootUpNBVoltage,
(unsigned long)vgainfo.ulHTLinkFreq,
vgainfo.usMinHTLinkWidth,
vgainfo.usMaxHTLinkWidth,
vgainfo.usUMASyncStartDelay,
vgainfo.usUMADataReturnTime,
vgainfo.usLinkStatusZeroTime,
(unsigned long)vgainfo.ulHighVoltageHTLinkFreq,
(unsigned long)vgainfo.ulLowVoltageHTLinkFreq,
vgainfo.usMaxUpStreamHTLinkWidth,
vgainfo.usMaxDownStreamHTLinkWidth,
vgainfo.usMinUpStreamHTLinkWidth,
vgainfo.usMinDownStreamHTLinkWidth);
/* Transfer the Table to VBIOS. */ /* Transfer the Table to VBIOS. */
pointer = (u32 *)&vgainfo; pointer = (u32 *)&vgainfo;
for(i=0; i<sizeof(ATOM_INTEGRATED_SYSTEM_INFO_V2); i+=4) for(i=0; i<sizeof(ATOM_INTEGRATED_SYSTEM_INFO_V2); i+=4)