nau8825: Add driver for I2C codec
The Nuvoton NAU8825 audio codec is an I2C device that has a number of
tunable parameters that can be provided to the kernel device driver for
basic configuration and optimal operation.
The configuration options are exposed to devicetree as registers and then
presented as Device Properties via ACPI to the operation system.
This sample configuration in devicetree:
device pci 19.2 on
chip drivers/i2c/nau8825
register "irq" = "IRQ_LEVEL_LOW(GPP_F10_IRQ)"
register "jkdet_enable" = "1"
register "sar_threshold_num" = "2"
register "sar_threshold[0]" = "0x0c"
register "sar_threshold[1]" = "0x1c"
device i2c 1a on end
end
end
Will generate the following code in the SSDT, trimmed for this commit
message as there are more properties that can be configured:
Scope (\_SB.PCI0.I2C4)
{
Name (_HID, "10508825")
Name (_UID, Zero)
Name (_DDN, "Nuvoton NAU8825 Codec")
Method (_STA) { Return (0xF) }
Name (_CRS, ResourceTemplate () {
I2cSerialBus (0x1A, ControllerInitiated, 0x61A80, AddressingMode7Bit,
"\_SB.PCI0.I2C4", 0, ResourceConsumer)
Interrupt (ResourceConsumer, Level, ActiveLow) { 0x3A }
})
Name (_DSD, Package () {
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bff4aa301"),
Package () {
Package () { "nuvoton,jkdet-enable", 1 },
Package () { "nuvoton,sar-threshold-num", 2 },
Package () { "nuvoton,sar-threshold", Package () { 0x0c, 0x1c } }
}
})
}
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Change-Id: I480d72daf5ac3dded9b1cbb5fbc737b9dfde3834
Reviewed-on: https://review.coreboot.org/15015
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie
Martin Roth
parent
16f3d3d35f
commit
7522dc3c07
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config DRIVERS_I2C_NAU8825
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bool
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ramstage-$(CONFIG_DRIVERS_I2C_NAU8825) += nau8825.c
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#include <arch/acpi_device.h>
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#define NAU8825_MAX_BUTTONS 8
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/*
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* Nuvoton NAU8825 audio codec devicetree bindings
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* linux/Documentation/devicetree/bindings/sound/nau8825.txt
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*/
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struct drivers_i2c_nau8825_config {
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/* Interrupt configuration */
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struct acpi_irq irq;
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/* I2C Bus Frequency in Hertz (default 400kHz) */
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unsigned bus_speed;
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/* Enable jack detection via JKDET pin */
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unsigned jkdet_enable;
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/* Enable JKDET pin pull if set, otherwise high impedance state */
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unsigned jkdet_pull_enable;
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/* Pull-up JKDET pin if set, otherwise pull down */
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unsigned jkdet_pull_up;
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/* JKDET pin polarity, 0 => active high, 1 => active low */
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unsigned jkdet_polarity;
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/*
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* VREF Impedance selection
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* 0 - Open
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* 1 - 25 kOhm
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* 2 - 125 kOhm
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* 3 - 2.5 kOhm
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*/
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unsigned vref_impedance;
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/* Button impedance measurement hysteresis */
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unsigned sar_hysteresis;
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/*
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* Reference voltage for button impedance measurement and micbias
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* 0 - VDDA
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* 1 - VDDA
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* 2 - VDDA * 1.1
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* 3 - VDDA * 1.2
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* 4 - VDDA * 1.3
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* 5 - VDDA * 1.4
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* 6 - VDDA * 1.53
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* 7 - VDDA * 1.53
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*/
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unsigned micbias_voltage;
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unsigned sar_voltage;
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/*
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* SAR compare time
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* 0 - 500 ns
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* 1 - 1 us
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* 2 - 2 us
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* 3 - 4 us
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*/
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unsigned sar_compare_time;
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/*
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* SAR sampling time
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* 0 - 2 us
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* 1 - 4 us
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* 2 - 8 us
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* 3 - 16 us
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*/
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unsigned sar_sampling_time;
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/*
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* Button short key press debounce time
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* 0 - 30 ms
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* 1 - 50 ms
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* 2 - 100 ms
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* 3 - 30 ms
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*/
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unsigned short_key_debounce;
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/* Debounce time 2^(n+2) ms (0-7) for jack insert */
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unsigned jack_insert_debounce;
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/* Debounce time 2^(n+2) ms (0-7) for jack eject */
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unsigned jack_eject_debounce;
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/* Number of buttons supported, up to 8 */
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unsigned sar_threshold_num;
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/*
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* Impedance threshold for each button, up to 8
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* SAR = 255 * micbias_voltage / sar_voltage * R / (2000 + R)
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* R is Button impedance
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*/
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uint64_t sar_threshold[NAU8825_MAX_BUTTONS];
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};
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@ -0,0 +1,117 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2016 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/acpi.h>
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#include <arch/acpi_device.h>
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#include <arch/acpigen.h>
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#include <console/console.h>
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#include <device/i2c.h>
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#include <device/device.h>
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#include <device/path.h>
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#include <stdint.h>
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#include <string.h>
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#include "chip.h"
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#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
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#define NAU8825_ACPI_NAME "NAU8"
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#define NAU8825_ACPI_HID "10508825"
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#define NAU8825_DP_INT(key,val) acpi_dp_write_integer("nuvoton," key, (val))
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static void nau8825_fill_ssdt(struct device *dev)
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{
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struct drivers_i2c_nau8825_config *config = dev->chip_info;
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const char *scope = acpi_device_scope(dev);
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struct acpi_i2c i2c = {
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.address = dev->path.i2c.device,
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.mode_10bit = dev->path.i2c.mode_10bit,
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.speed = config->bus_speed ? : I2C_SPEED_FAST,
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.resource = scope,
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};
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if (!dev->enabled || !scope)
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return;
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if (config->sar_threshold_num > NAU8825_MAX_BUTTONS)
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return;
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/* Device */
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acpigen_write_scope(scope);
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acpigen_write_device(acpi_device_name(dev));
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acpigen_write_name_string("_HID", NAU8825_ACPI_HID);
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acpigen_write_name_integer("_UID", 0);
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acpigen_write_name_string("_DDN", dev->chip_ops->name);
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acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON);
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/* Resources */
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acpigen_write_name("_CRS");
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acpigen_write_resourcetemplate_header();
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acpi_device_write_i2c(&i2c);
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acpi_device_write_interrupt(&config->irq);
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acpigen_write_resourcetemplate_footer();
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/* Device Properties */
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acpi_dp_write_header();
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NAU8825_DP_INT("jkdet-enable", config->jkdet_enable);
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NAU8825_DP_INT("jkdet-pull-enable", config->jkdet_pull_enable);
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NAU8825_DP_INT("jkdet-pull-up", config->jkdet_pull_up);
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NAU8825_DP_INT("jkdet-polarity", config->jkdet_polarity);
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NAU8825_DP_INT("vref-impedance", config->vref_impedance);
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NAU8825_DP_INT("micbias-voltage", config->micbias_voltage);
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NAU8825_DP_INT("sar-hysteresis", config->sar_hysteresis);
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NAU8825_DP_INT("sar-voltage", config->sar_voltage);
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NAU8825_DP_INT("sar-compare-time", config->sar_compare_time);
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NAU8825_DP_INT("sar-sampling-time", config->sar_sampling_time);
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NAU8825_DP_INT("short-key-debounce", config->short_key_debounce);
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NAU8825_DP_INT("jack-insert-debounce", config->jack_insert_debounce);
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NAU8825_DP_INT("jack-eject-deboune", config->jack_eject_debounce);
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NAU8825_DP_INT("sar-threshold-num", config->sar_threshold_num);
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acpi_dp_write_integer_array("nuvoton,sar-threshold",
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config->sar_threshold,
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config->sar_threshold_num);
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acpi_dp_write_footer();
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acpigen_pop_len(); /* Device */
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acpigen_pop_len(); /* Scope */
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printk(BIOS_INFO, "%s: %s address 0%xh irq %d\n",
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acpi_device_path(dev), dev->chip_ops->name,
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dev->path.i2c.device, config->irq.pin);
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}
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static const char *nau8825_acpi_name(struct device *dev)
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{
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return NAU8825_ACPI_NAME;
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}
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#endif
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static struct device_operations nau8825_ops = {
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.read_resources = DEVICE_NOOP,
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.set_resources = DEVICE_NOOP,
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.enable_resources = DEVICE_NOOP,
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#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
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.acpi_name = &nau8825_acpi_name,
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.acpi_fill_ssdt_generator = &nau8825_fill_ssdt,
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#endif
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};
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static void nau8825_enable(struct device *dev)
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{
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dev->ops = &nau8825_ops;
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}
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struct chip_operations drivers_i2c_nau8825_ops = {
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CHIP_NAME("Nuvoton NAU8825 Codec")
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.enable_dev = &nau8825_enable
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};
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