soc/intel: Geminilake Refresh feature request support

Add 0x706a8 for GLK Refresh CPU stepping ID.

BUG=b:132414963
BRANCH=None
TEST=Image built successfully.

Signed-off-by: John Zhao <john.zhao@intel.com>
Change-Id: I4641d9bd4c82211e7200f617cae9043b0f2f38d1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32744
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>

src/soc/intel/apollolake/cpu.c

@@ -119,6 +119,7 @@ static const struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 },
 	{ X86_VENDOR_INTEL, CPUID_GLK_A0 },
 	{ X86_VENDOR_INTEL, CPUID_GLK_B0 },
+	{ X86_VENDOR_INTEL, CPUID_GLK_R0 },
 	{ 0, 0 },
 };
 

src/soc/intel/common/block/cpu/mp_init.c

@@ -70,6 +70,7 @@ static const struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 },
 	{ X86_VENDOR_INTEL, CPUID_GLK_A0 },
 	{ X86_VENDOR_INTEL, CPUID_GLK_B0 },
+	{ X86_VENDOR_INTEL, CPUID_GLK_R0 },
 	{ X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_V0 },
 	{ X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_W0 },
 	{ X86_VENDOR_INTEL, CPUID_COFFEELAKE_U0 },

src/soc/intel/common/block/include/intelblocks/mp_init.h

@@ -37,6 +37,7 @@
 #define CPUID_APOLLOLAKE_E0	0x506ca
 #define CPUID_GLK_A0		0x706a0
 #define CPUID_GLK_B0		0x706a1
+#define CPUID_GLK_R0		0x706a8
 #define CPUID_WHISKEYLAKE_V0	0x806ec
 #define CPUID_WHISKEYLAKE_W0	0x806eb
 #define CPUID_COFFEELAKE_D0	0x806ea