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mainboard/msi/ms9652_fam10: Fix coding style 

Change-Id: I8d6f738d358a0a3d4b602a2a607143d98f4710ed
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/23537
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Elyes HAOUAS 2018-02-01 09:35:53 +01:00 committed by Felix Held
parent 9a033af137
commit 7533e49fc6
2 changed files with 10 additions and 10 deletions
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7
src/mainboard/msi/ms9652_fam10/get_bus_conf.c
View File

@ -70,7 +70,8 @@ void get_bus_conf(void)
printk(BIOS_SPEW, "get_bus_conf()\n");
if(get_bus_conf_done == 1) return; //do it only once
if (get_bus_conf_done == 1)
return; //do it only once
get_bus_conf_done = 1;
@ -80,7 +81,7 @@ void get_bus_conf(void)
memset(m, 0, sizeof(struct mb_sysconf_t));
sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
for(i = 0; i < sysconf.hc_possible_num; i++) {
for (i = 0; i < sysconf.hc_possible_num; i++) {
sysconf.pci1234[i] = pci1234x[i];
sysconf.hcdn[i] = hcdnx[i];
}
@ -99,7 +100,7 @@ void get_bus_conf(void)
printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sysconf.sbdn + 0x06);
}
for(i = 2; i < 8; i++) {
for (i = 2; i < 8; i++) {
dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2 , 0));
if (dev) {
m->bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);

13
src/mainboard/msi/ms9652_fam10/mptable.c
View File

@ -88,17 +88,16 @@ static void *smp_write_config_table(void *v)
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+8)<<2)|0, m->apicid_mcp55, 0x16); // 22
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+9)<<2)|0, m->apicid_mcp55, 0x15); // 21
for(j = 7; j >= 2; j--) {
if(!m->bus_mcp55[j]) continue;
for(i = 0; i < 4; i++) {
for (j = 7; j >= 2; j--) {
if (!m->bus_mcp55[j])
continue;
for (i = 0; i < 4; i++)
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[j], (0x00 << 2)|i, m->apicid_mcp55, 0x10 + (2+j+i+4-sbdn%4)%4);
}
}
for(j = 0; j < 1; j++)
for(i = 0; i < 4; i++) {
for (j = 0; j < 1; j++)
for (i = 0; i < 4; i++)
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[1], ((0x04+j)<<2)|i, m->apicid_mcp55, 0x10 + (2+i+j)%4);
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
mptable_lintsrc(mc, bus_isa);