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mb/google/hatch/variants/baseboard: Update PL2 power limit value 

Update PL2 power limit value from 44W to 64W.

BUG=None
BRANCH=None
TEST=Build and Boot hatch EVT

Change-Id: I3f4b5ab8bf0ce9464c322c148843f5a3e8d706d9
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33662
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Shelley Chen <shchen@google.com>
This commit is contained in:
Sumeet Pawnikar 2019-06-21 18:05:37 +05:30 committed by Furquan Shaikh
parent c8db633852
commit 755a0131be
2 changed files with 2 additions and 2 deletions
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2
src/mainboard/google/hatch/variants/baseboard/devicetree.cb
View File

@ -36,7 +36,7 @@ chip soc/intel/cannonlake
# Enable DPTF
register "dptf_enable" = "1"
register "tdp_pl1_override" = "15"
register "tdp_pl2_override" = "44"
register "tdp_pl2_override" = "64"
register "Device4Enable" = "1"
# Enable eDP device
register "DdiPortEdp" = "1"

2
src/mainboard/google/hatch/variants/baseboard/include/baseboard/acpi/dptf.asl
View File

@ -118,7 +118,7 @@ Name (MPPC, Package ()
Package () { /* Power Limit 2 */
1, /* PowerLimitIndex, 1 for Power Limit 2 */
15000, /* PowerLimitMinimum */
44000, /* PowerLimitMaximum */
64000, /* PowerLimitMaximum */
28000, /* TimeWindowMinimum */
32000, /* TimeWindowMaximum */
1000 /* StepSize */