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(console,drivers/uart)/Kconfig: Fix dependencies 

The dependencies of CONSOLE_SERIAL and DRIVERS_UART were somehow
backwards. Fix that. Now, CONSOLE_SERIAL depends on DRIVERS_UART,
because it's using its interface. The individual UART drivers
select DRIVERS_UART, because they implement the interface and
depend on the common UART code.

Some guards had to be fixed (using CONSOLE_SERIAL now instead of
DRIVERS_UART). Some other guards that were only about compilation
of units were removed. We want to build test as much as possible,
right?

Change-Id: I0ea73a8909f07202b23c88db93df74cf9dc8abf9
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/29572
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Nico Huber 2018-11-11 01:42:17 +01:00
parent 7470c902d8
commit 755db95d1a
24 changed files with 64 additions and 102 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/console/Kconfig
View File

@ -29,7 +29,7 @@ config SQUELCH_EARLY_SMP
config CONSOLE_SERIAL config CONSOLE_SERIAL
bool "Serial port console output" bool "Serial port console output"
default y default y
depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM || HAVE_UART_SPECIAL depends on DRIVERS_UART
help help
Send coreboot debug output to a serial port. Send coreboot debug output to a serial port.

4
src/cpu/allwinner/a10/Makefile.inc
View File

@ -21,11 +21,9 @@ ramstage-y += monotonic_timer.c
ramstage-y += timer.c ramstage-y += timer.c
ramstage-y += twi.c ramstage-y += twi.c
ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-y += uart.c uart_console.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c uart_console.c
romstage-y += uart.c uart_console.c romstage-y += uart.c uart_console.c
ramstage-y += uart.c uart_console.c ramstage-y += uart.c uart_console.c
endif
real-target: $(obj)/BOOT0 real-target: $(obj)/BOOT0

4
src/cpu/ti/am335x/Makefile.inc
View File

@ -12,11 +12,9 @@ ramstage-y += monotonic_timer.c
ramstage-y += nand.c ramstage-y += nand.c
ramstage-y += cbmem.c ramstage-y += cbmem.c
ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-y += uart.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
romstage-y += uart.c romstage-y += uart.c
ramstage-y += uart.c ramstage-y += uart.c
endif
$(call add-class,omap-header) $(call add-class,omap-header)
$(eval $(call create_class_compiler,omap-header,arm)) $(eval $(call create_class_compiler,omap-header,arm))

5
src/drivers/uart/Kconfig
View File

@ -1,7 +1,5 @@
config DRIVERS_UART config DRIVERS_UART
bool bool
default y if CONSOLE_SERIAL
default n
config DRIVERS_UART_8250IO config DRIVERS_UART_8250IO
# FIXME: Shouldn't have a prompt, should default to n, and # FIXME: Shouldn't have a prompt, should default to n, and
@ -11,6 +9,7 @@ config DRIVERS_UART_8250IO
default n if DRIVERS_UART_8250MEM || HAVE_UART_SPECIAL default n if DRIVERS_UART_8250MEM || HAVE_UART_SPECIAL
default n if NO_UART_ON_SUPERIO default n if NO_UART_ON_SUPERIO
default y default y
select DRIVERS_UART
config DRIVERS_UART_8250IO_SKIP_INIT config DRIVERS_UART_8250IO_SKIP_INIT
def_bool n def_bool n
@ -37,6 +36,7 @@ config UART_OVERRIDE_REFCLK
config DRIVERS_UART_8250MEM config DRIVERS_UART_8250MEM
bool bool
default n default n
select DRIVERS_UART
config DRIVERS_UART_8250MEM_32 config DRIVERS_UART_8250MEM_32
bool bool
@ -46,6 +46,7 @@ config DRIVERS_UART_8250MEM_32
config HAVE_UART_SPECIAL config HAVE_UART_SPECIAL
bool bool
default n default n
select DRIVERS_UART
config DRIVERS_UART_OXPCIE config DRIVERS_UART_OXPCIE
bool "Oxford OXPCIe952" bool "Oxford OXPCIe952"

16
src/mainboard/google/gru/bootblock.c
View File

@ -49,16 +49,16 @@ void bootblock_mainboard_early_init(void)
if (!IS_ENABLED(CONFIG_GRU_BASEBOARD_SCARLET)) if (!IS_ENABLED(CONFIG_GRU_BASEBOARD_SCARLET))
gpio_output(GPIO_P15V_EN, 1); /* Scarlet: EC-controlled */ gpio_output(GPIO_P15V_EN, 1); /* Scarlet: EC-controlled */
#if IS_ENABLED(CONFIG_DRIVERS_UART) if (IS_ENABLED(CONFIG_CONSOLE_SERIAL)) {
_Static_assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE, _Static_assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE,
"CONSOLE_SERIAL_UART should be UART2"); "CONSOLE_SERIAL_UART should be UART2");
/* iomux: select gpio4c[4:3] as uart2 dbg port */ /* iomux: select gpio4c[4:3] as uart2 dbg port */
write32(&rk3399_grf->iomux_uart2c, IOMUX_UART2C); write32(&rk3399_grf->iomux_uart2c, IOMUX_UART2C);
/* grf soc_con7[11:10] use for uart2 select */ /* grf soc_con7[11:10] use for uart2 select */
write32(&rk3399_grf->soc_con7, UART2C_SEL); write32(&rk3399_grf->soc_con7, UART2C_SEL);
#endif }
} }
static void configure_spi_flash(void) static void configure_spi_flash(void)

3
src/mainboard/google/veyron/bootblock.c
View File

@ -31,11 +31,10 @@
void bootblock_mainboard_early_init() void bootblock_mainboard_early_init()
{ {
if (IS_ENABLED(CONFIG_DRIVERS_UART)) { if (IS_ENABLED(CONFIG_CONSOLE_SERIAL)) {
assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE); assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE);
write32(&rk3288_grf->iomux_uart2, IOMUX_UART2); write32(&rk3288_grf->iomux_uart2, IOMUX_UART2);
} }
} }
void bootblock_mainboard_init(void) void bootblock_mainboard_init(void)

3
src/mainboard/google/veyron_mickey/bootblock.c
View File

@ -31,11 +31,10 @@
void bootblock_mainboard_early_init() void bootblock_mainboard_early_init()
{ {
if (IS_ENABLED(CONFIG_DRIVERS_UART)) { if (IS_ENABLED(CONFIG_CONSOLE_SERIAL)) {
assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE); assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE);
write32(&rk3288_grf->iomux_uart2, IOMUX_UART2); write32(&rk3288_grf->iomux_uart2, IOMUX_UART2);
} }
} }
void bootblock_mainboard_init(void) void bootblock_mainboard_init(void)

3
src/mainboard/google/veyron_rialto/bootblock.c
View File

@ -31,11 +31,10 @@
void bootblock_mainboard_early_init() void bootblock_mainboard_early_init()
{ {
if (IS_ENABLED(CONFIG_DRIVERS_UART)) { if (IS_ENABLED(CONFIG_CONSOLE_SERIAL)) {
assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE); assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE);
write32(&rk3288_grf->iomux_uart2, IOMUX_UART2); write32(&rk3288_grf->iomux_uart2, IOMUX_UART2);
} }
} }
void bootblock_mainboard_init(void) void bootblock_mainboard_init(void)

8
src/soc/broadcom/cygnus/Makefile.inc
View File

@ -23,13 +23,13 @@ bootblock-y += tz.c
bootblock-y += hw_init.c bootblock-y += hw_init.c
bootblock-$(CONFIG_SPI_FLASH) += spi.c bootblock-$(CONFIG_SPI_FLASH) += spi.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
bootblock-$(CONFIG_DRIVERS_UART) += ns16550.c bootblock-y += ns16550.c
endif endif
verstage-y += i2c.c verstage-y += i2c.c
verstage-y += timer.c verstage-y += timer.c
verstage-$(CONFIG_SPI_FLASH) += spi.c verstage-$(CONFIG_SPI_FLASH) += spi.c
verstage-$(CONFIG_DRIVERS_UART) += ns16550.c verstage-y += ns16550.c
romstage-y += cbmem.c romstage-y += cbmem.c
romstage-y += i2c.c romstage-y += i2c.c
@ -37,7 +37,7 @@ romstage-y += timer.c
romstage-y += romstage.c romstage-y += romstage.c
romstage-y += sdram.c romstage-y += sdram.c
romstage-$(CONFIG_SPI_FLASH) += spi.c romstage-$(CONFIG_SPI_FLASH) += spi.c
romstage-$(CONFIG_DRIVERS_UART) += ns16550.c romstage-y += ns16550.c
romstage-y += ddr_init.c romstage-y += ddr_init.c
romstage-y += ddr_init_table.c romstage-y += ddr_init_table.c
romstage-y += shmoo_and28.c romstage-y += shmoo_and28.c
@ -53,7 +53,7 @@ ramstage-y += sdram.c
ramstage-y += soc.c ramstage-y += soc.c
ramstage-y += timer.c ramstage-y += timer.c
ramstage-$(CONFIG_SPI_FLASH) += spi.c ramstage-$(CONFIG_SPI_FLASH) += spi.c
ramstage-$(CONFIG_DRIVERS_UART) += ns16550.c ramstage-y += ns16550.c
ramstage-y += usb.c ramstage-y += usb.c
CPPFLAGS_common += -Isrc/soc/broadcom/cygnus/include/ CPPFLAGS_common += -Isrc/soc/broadcom/cygnus/include/

7
src/soc/cavium/cn81xx/Makefile.inc
View File

@ -25,9 +25,6 @@ bootblock-y += timer.c
bootblock-y += spi.c bootblock-y += spi.c
bootblock-y += uart.c bootblock-y += uart.c
bootblock-y += cpu.c bootblock-y += cpu.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
bootblock-$(CONFIG_DRIVERS_UART) += uart.c
endif
################################################################################ ################################################################################
# verstage # verstage
@ -37,7 +34,7 @@ verstage-y += clock.c
verstage-y += gpio.c verstage-y += gpio.c
verstage-y += timer.c verstage-y += timer.c
verstage-y += spi.c verstage-y += spi.c
verstage-$(CONFIG_DRIVERS_UART) += uart.c verstage-y += uart.c
verstage-y += cbmem.c verstage-y += cbmem.c
################################################################################ ################################################################################
@ -49,7 +46,6 @@ romstage-y += gpio.c
romstage-y += timer.c romstage-y += timer.c
romstage-y += spi.c romstage-y += spi.c
romstage-y += uart.c romstage-y += uart.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c
romstage-y += cbmem.c romstage-y += cbmem.c
romstage-y += sdram.c romstage-y += sdram.c
@ -64,7 +60,6 @@ ramstage-y += gpio.c
ramstage-y += timer.c ramstage-y += timer.c
ramstage-y += spi.c ramstage-y += spi.c
ramstage-y += uart.c ramstage-y += uart.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c
ramstage-y += sdram.c ramstage-y += sdram.c
ramstage-y += soc.c ramstage-y += soc.c
ramstage-y += cpu.c ramstage-y += cpu.c

4
src/soc/imgtec/pistachio/Makefile.inc
View File

@ -22,11 +22,9 @@ bootblock-y += spi.c
romstage-y += spi.c romstage-y += spi.c
ramstage-y += spi.c ramstage-y += spi.c
ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-y += uart.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
romstage-y += uart.c romstage-y += uart.c
ramstage-y += uart.c ramstage-y += uart.c
endif
bootblock-y += monotonic_timer.c bootblock-y += monotonic_timer.c

10
src/soc/mediatek/mt8173/Makefile.inc
View File

@ -23,9 +23,7 @@ bootblock-y += ../common/spi.c spi.c
bootblock-y += ../common/timer.c bootblock-y += ../common/timer.c
bootblock-y += timer.c bootblock-y += timer.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) bootblock-y += ../common/uart.c
bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
endif
bootblock-y += ../common/gpio.c gpio.c gpio_init.c bootblock-y += ../common/gpio.c gpio.c gpio_init.c
bootblock-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c bootblock-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c
@ -37,7 +35,7 @@ bootblock-y += ../common/mmu_operations.c mmu_operations.c
verstage-y += i2c.c verstage-y += i2c.c
verstage-y += ../common/spi.c spi.c verstage-y += ../common/spi.c spi.c
verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c verstage-y += ../common/uart.c
verstage-y += ../common/timer.c verstage-y += ../common/timer.c
verstage-y += timer.c verstage-y += timer.c
@ -53,7 +51,7 @@ romstage-y += ../common/timer.c
romstage-y += timer.c romstage-y += timer.c
romstage-y += i2c.c romstage-y += i2c.c
romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c romstage-y += ../common/uart.c
romstage-y += ../common/cbmem.c romstage-y += ../common/cbmem.c
romstage-y += ../common/gpio.c gpio.c romstage-y += ../common/gpio.c gpio.c
romstage-y += ../common/spi.c spi.c romstage-y += ../common/spi.c spi.c
@ -72,7 +70,7 @@ ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c
ramstage-y += soc.c ../common/mtcmos.c ramstage-y += soc.c ../common/mtcmos.c
ramstage-y += ../common/timer.c ramstage-y += ../common/timer.c
ramstage-y += timer.c ramstage-y += timer.c
ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c ramstage-y += ../common/uart.c
ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c i2c.c ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c i2c.c
ramstage-y += mt6311.c ramstage-y += mt6311.c
ramstage-y += da9212.c ramstage-y += da9212.c

10
src/soc/mediatek/mt8183/Makefile.inc
View File

@ -6,9 +6,7 @@ bootblock-y += ../common/gpio.c gpio.c
bootblock-y += ../common/pll.c pll.c bootblock-y += ../common/pll.c pll.c
bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
bootblock-y += ../common/timer.c bootblock-y += ../common/timer.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) bootblock-y += ../common/uart.c
bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
endif
bootblock-y += ../common/wdt.c bootblock-y += ../common/wdt.c
decompressor-y += decompressor.c decompressor-y += decompressor.c
@ -19,7 +17,7 @@ verstage-y += auxadc.c
verstage-y += ../common/gpio.c gpio.c verstage-y += ../common/gpio.c gpio.c
verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
verstage-y += ../common/timer.c verstage-y += ../common/timer.c
verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c verstage-y += ../common/uart.c
verstage-y += ../common/wdt.c verstage-y += ../common/wdt.c
romstage-y += auxadc.c romstage-y += auxadc.c
@ -32,7 +30,7 @@ romstage-y += ../common/gpio.c gpio.c
romstage-y += ../common/mmu_operations.c mmu_operations.c romstage-y += ../common/mmu_operations.c mmu_operations.c
romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
romstage-y += ../common/timer.c romstage-y += ../common/timer.c
romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c romstage-y += ../common/uart.c
romstage-y += ../common/wdt.c romstage-y += ../common/wdt.c
ramstage-y += auxadc.c ramstage-y += auxadc.c
@ -43,7 +41,7 @@ ramstage-y += ../common/mtcmos.c mtcmos.c
ramstage-y += soc.c ramstage-y += soc.c
ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
ramstage-y += ../common/timer.c ramstage-y += ../common/timer.c
ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c ramstage-y += ../common/uart.c
ramstage-y += ../common/usb.c ramstage-y += ../common/usb.c
ramstage-y += ../common/wdt.c ramstage-y += ../common/wdt.c

10
src/soc/nvidia/tegra124/Makefile.inc
View File

@ -16,15 +16,13 @@ bootblock-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c
bootblock-y += ../tegra/pingroup.c bootblock-y += ../tegra/pingroup.c
bootblock-y += ../tegra/pinmux.c bootblock-y += ../tegra/pinmux.c
bootblock-y += ../tegra/apbmisc.c bootblock-y += ../tegra/apbmisc.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) bootblock-y += uart.c
bootblock-$(CONFIG_DRIVERS_UART) += uart.c
endif
verstage-y += verstage.c verstage-y += verstage.c
verstage-y += dma.c verstage-y += dma.c
verstage-y += monotonic_timer.c verstage-y += monotonic_timer.c
verstage-y += spi.c verstage-y += spi.c
verstage-$(CONFIG_DRIVERS_UART) += uart.c verstage-y += uart.c
verstage-y += ../tegra/gpio.c verstage-y += ../tegra/gpio.c
verstage-y += ../tegra/i2c.c verstage-y += ../tegra/i2c.c
verstage-y += ../tegra/pinmux.c verstage-y += ../tegra/pinmux.c
@ -46,7 +44,7 @@ romstage-y += ../tegra/i2c.c
romstage-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c romstage-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c
romstage-y += ../tegra/pinmux.c romstage-y += ../tegra/pinmux.c
romstage-y += cache.c romstage-y += cache.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c romstage-y += uart.c
ramstage-y += cbmem.c ramstage-y += cbmem.c
ramstage-y += clock.c ramstage-y += clock.c
@ -65,7 +63,7 @@ ramstage-y += ../tegra/i2c.c
ramstage-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c ramstage-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c
ramstage-y += ../tegra/pinmux.c ramstage-y += ../tegra/pinmux.c
ramstage-y += ../tegra/usb.c ramstage-y += ../tegra/usb.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += uart.c
rmodules_$(ARCH-romstage-y)-y += monotonic_timer.c rmodules_$(ARCH-romstage-y)-y += monotonic_timer.c

10
src/soc/nvidia/tegra210/Makefile.inc
View File

@ -18,16 +18,14 @@ bootblock-y += ../tegra/pingroup.c
bootblock-y += ../tegra/pinmux.c bootblock-y += ../tegra/pinmux.c
bootblock-y += ../tegra/apbmisc.c bootblock-y += ../tegra/apbmisc.c
bootblock-y += ../tegra/usb.c bootblock-y += ../tegra/usb.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) bootblock-y += uart.c
bootblock-$(CONFIG_DRIVERS_UART) += uart.c
endif
verstage-y += dma.c verstage-y += dma.c
verstage-y += monotonic_timer.c verstage-y += monotonic_timer.c
verstage-y += spi.c verstage-y += spi.c
verstage-y += padconfig.c verstage-y += padconfig.c
verstage-y += funitcfg.c verstage-y += funitcfg.c
verstage-$(CONFIG_DRIVERS_UART) += uart.c verstage-y += uart.c
verstage-y += ../tegra/gpio.c verstage-y += ../tegra/gpio.c
verstage-y += ../tegra/i2c.c verstage-y += ../tegra/i2c.c
verstage-y += ../tegra/pinmux.c verstage-y += ../tegra/pinmux.c
@ -57,7 +55,7 @@ romstage-y += ../tegra/gpio.c
romstage-y += ../tegra/i2c.c romstage-y += ../tegra/i2c.c
romstage-y += ../tegra/pinmux.c romstage-y += ../tegra/pinmux.c
romstage-y += ../tegra/usb.c romstage-y += ../tegra/usb.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c romstage-y += uart.c
ramstage-y += addressmap.c ramstage-y += addressmap.c
ramstage-y += cbmem.c ramstage-y += cbmem.c
@ -92,7 +90,7 @@ ramstage-y += ../tegra/i2c.c
ramstage-y += ../tegra/pinmux.c ramstage-y += ../tegra/pinmux.c
ramstage-y += ramstage.c ramstage-y += ramstage.c
ramstage-y += mmu_operations.c ramstage-y += mmu_operations.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += uart.c
ramstage-y += ../tegra/usb.c ramstage-y += ../tegra/usb.c
ramstage-$(CONFIG_HAVE_MTC) += mtc.c ramstage-$(CONFIG_HAVE_MTC) += mtc.c
ramstage-y += stage_entry.S ramstage-y += stage_entry.S

6
src/soc/qualcomm/ipq40xx/Makefile.inc
View File

@ -20,7 +20,7 @@ bootblock-y += cbmem.c
bootblock-y += gpio.c bootblock-y += gpio.c
bootblock-$(CONFIG_SPI_FLASH) += spi.c bootblock-$(CONFIG_SPI_FLASH) += spi.c
bootblock-y += timer.c bootblock-y += timer.c
bootblock-$(CONFIG_DRIVERS_UART) += uart.c bootblock-y += uart.c
verstage-y += clock.c verstage-y += clock.c
verstage-y += gpio.c verstage-y += gpio.c
@ -29,14 +29,14 @@ verstage-y += i2c.c
verstage-y += qup.c verstage-y += qup.c
verstage-y += spi.c verstage-y += spi.c
verstage-y += timer.c verstage-y += timer.c
verstage-$(CONFIG_DRIVERS_UART) += uart.c verstage-y += uart.c
romstage-y += clock.c romstage-y += clock.c
romstage-y += blobs_init.c romstage-y += blobs_init.c
romstage-y += gpio.c romstage-y += gpio.c
romstage-$(CONFIG_SPI_FLASH) += spi.c romstage-$(CONFIG_SPI_FLASH) += spi.c
romstage-y += timer.c romstage-y += timer.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c romstage-y += uart.c
romstage-y += cbmem.c romstage-y += cbmem.c
romstage-y += i2c.c romstage-y += i2c.c
romstage-y += blsp.c romstage-y += blsp.c

5
src/soc/qualcomm/ipq40xx/uart.c
View File

@ -107,7 +107,6 @@ static unsigned int msm_boot_uart_dm_init_rx_transfer(void *uart_dm_base)
return MSM_BOOT_UART_DM_E_SUCCESS; return MSM_BOOT_UART_DM_E_SUCCESS;
} }
#if IS_ENABLED(CONFIG_DRIVERS_UART)
static unsigned int msm_boot_uart_dm_init(void *uart_dm_base); static unsigned int msm_boot_uart_dm_init(void *uart_dm_base);
/* Received data is valid or not */ /* Received data is valid or not */
@ -116,7 +115,6 @@ static int valid_data = 0;
/* Received data */ /* Received data */
static unsigned int word = 0; static unsigned int word = 0;
void uart_tx_byte(int idx, unsigned char data) void uart_tx_byte(int idx, unsigned char data)
{ {
int num_of_chars = 1; int num_of_chars = 1;
@ -135,7 +133,6 @@ void uart_tx_byte(int idx, unsigned char data)
/* And now write the character(s) */ /* And now write the character(s) */
write32(MSM_BOOT_UART_DM_TF(base, 0), data); write32(MSM_BOOT_UART_DM_TF(base, 0), data);
} }
#endif /* CONFIG_SERIAL_UART */
/** /**
* @brief msm_boot_uart_dm_reset - resets UART controller * @brief msm_boot_uart_dm_reset - resets UART controller
@ -270,7 +267,6 @@ void uart_tx_flush(int idx)
; ;
} }
#if IS_ENABLED(CONFIG_DRIVERS_UART)
/** /**
* ipq40xx_serial_getc - reads a character * ipq40xx_serial_getc - reads a character
* *
@ -286,7 +282,6 @@ uint8_t uart_rx_byte(int idx)
return byte; return byte;
} }
#endif
#ifndef __PRE_RAM__ #ifndef __PRE_RAM__
/* TODO: Implement function */ /* TODO: Implement function */

6
src/soc/qualcomm/ipq806x/Makefile.inc
View File

@ -19,7 +19,7 @@ bootblock-y += clock.c
bootblock-y += gpio.c bootblock-y += gpio.c
bootblock-$(CONFIG_SPI_FLASH) += spi.c bootblock-$(CONFIG_SPI_FLASH) += spi.c
bootblock-y += timer.c bootblock-y += timer.c
bootblock-$(CONFIG_DRIVERS_UART) += uart.c bootblock-y += uart.c
verstage-y += clock.c verstage-y += clock.c
verstage-y += gpio.c verstage-y += gpio.c
@ -28,14 +28,14 @@ verstage-y += i2c.c
verstage-y += qup.c verstage-y += qup.c
verstage-y += spi.c verstage-y += spi.c
verstage-y += timer.c verstage-y += timer.c
verstage-$(CONFIG_DRIVERS_UART) += uart.c verstage-y += uart.c
romstage-y += clock.c romstage-y += clock.c
romstage-y += blobs_init.c romstage-y += blobs_init.c
romstage-y += gpio.c romstage-y += gpio.c
romstage-$(CONFIG_SPI_FLASH) += spi.c romstage-$(CONFIG_SPI_FLASH) += spi.c
romstage-y += timer.c romstage-y += timer.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c romstage-y += uart.c
romstage-y += cbmem.c romstage-y += cbmem.c
romstage-y += i2c.c romstage-y += i2c.c
romstage-y += gsbi.c romstage-y += gsbi.c

4
src/soc/qualcomm/ipq806x/uart.c
View File

@ -109,7 +109,6 @@ static unsigned int msm_boot_uart_dm_init_rx_transfer(void *uart_dm_base)
return MSM_BOOT_UART_DM_E_SUCCESS; return MSM_BOOT_UART_DM_E_SUCCESS;
} }
#if IS_ENABLED(CONFIG_DRIVERS_UART)
static unsigned int msm_boot_uart_dm_init(void *uart_dm_base); static unsigned int msm_boot_uart_dm_init(void *uart_dm_base);
/* Received data is valid or not */ /* Received data is valid or not */
@ -212,7 +211,6 @@ void uart_tx_byte(int idx, unsigned char data)
/* And now write the character(s) */ /* And now write the character(s) */
write32(MSM_BOOT_UART_DM_TF(base, 0), tx_data); write32(MSM_BOOT_UART_DM_TF(base, 0), tx_data);
} }
#endif /* CONFIG_SERIAL_UART */
/* /*
* msm_boot_uart_dm_reset - resets UART controller * msm_boot_uart_dm_reset - resets UART controller
@ -380,7 +378,6 @@ int uart_can_rx_byte(void)
} }
#endif #endif
#if IS_ENABLED(CONFIG_DRIVERS_UART)
/** /**
* ipq806x_serial_getc - reads a character * ipq806x_serial_getc - reads a character
* *
@ -401,7 +398,6 @@ uint8_t uart_rx_byte(int idx)
return byte; return byte;
} }
#endif
#ifndef __PRE_RAM__ #ifndef __PRE_RAM__
/* TODO: Implement fuction */ /* TODO: Implement fuction */

2
src/soc/qualcomm/sdm845/Makefile.inc
View File

@ -7,7 +7,7 @@ bootblock-y += spi.c
bootblock-y += mmu.c bootblock-y += mmu.c
bootblock-y += timer.c bootblock-y += timer.c
bootblock-y += gpio.c bootblock-y += gpio.c
bootblock-$(CONFIG_DRIVERS_UART) += uart_bitbang.c bootblock-y += uart_bitbang.c
################################################################################ ################################################################################
verstage-y += spi.c verstage-y += spi.c

10
src/soc/rockchip/rk3288/Makefile.inc
View File

@ -19,9 +19,7 @@ IDBTOOL = util/rockchip/make_idb.py
bootblock-y += bootblock.c bootblock-y += bootblock.c
bootblock-y += ../common/cbmem.c bootblock-y += ../common/cbmem.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) bootblock-y += ../common/uart.c
bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
endif
bootblock-y += timer.c bootblock-y += timer.c
bootblock-y += clock.c bootblock-y += clock.c
bootblock-y += ../common/spi.c bootblock-y += ../common/spi.c
@ -33,7 +31,7 @@ bootblock-y += ../common/rk808.c
verstage-y += ../common/spi.c verstage-y += ../common/spi.c
verstage-y += timer.c verstage-y += timer.c
verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c verstage-y += ../common/uart.c
verstage-y += ../common/gpio.c verstage-y += ../common/gpio.c
verstage-y += gpio.c verstage-y += gpio.c
verstage-y += clock.c verstage-y += clock.c
@ -43,7 +41,7 @@ verstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
romstage-y += ../common/cbmem.c romstage-y += ../common/cbmem.c
romstage-y += timer.c romstage-y += timer.c
romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c romstage-y += ../common/uart.c
romstage-y += ../common/i2c.c romstage-y += ../common/i2c.c
romstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c romstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
romstage-y += clock.c romstage-y += clock.c
@ -72,7 +70,7 @@ ramstage-y += ../common/vop.c
ramstage-y += ../common/edp.c ramstage-y += ../common/edp.c
ramstage-y += hdmi.c ramstage-y += hdmi.c
ramstage-y += display.c ramstage-y += display.c
ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c ramstage-y += ../common/uart.c
CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include
CPPFLAGS_common += -Isrc/soc/rockchip/common/include CPPFLAGS_common += -Isrc/soc/rockchip/common/include

10
src/soc/rockchip/rk3399/Makefile.inc
View File

@ -22,9 +22,7 @@ decompressor-y += timer.c
bootblock-y += ../common/i2c.c bootblock-y += ../common/i2c.c
bootblock-y += ../common/spi.c bootblock-y += ../common/spi.c
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) bootblock-y += ../common/uart.c
bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
endif
bootblock-y += ../common/gpio.c bootblock-y += ../common/gpio.c
bootblock-y += ../common/pwm.c bootblock-y += ../common/pwm.c
bootblock-y += bootblock.c bootblock-y += bootblock.c
@ -39,7 +37,7 @@ verstage-y += gpio.c
verstage-y += sdram.c verstage-y += sdram.c
verstage-y += ../common/i2c.c verstage-y += ../common/i2c.c
verstage-y += ../common/spi.c verstage-y += ../common/spi.c
verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c verstage-y += ../common/uart.c
verstage-y += clock.c verstage-y += clock.c
verstage-y += timer.c verstage-y += timer.c
@ -48,7 +46,7 @@ verstage-y += timer.c
romstage-y += ../common/cbmem.c romstage-y += ../common/cbmem.c
romstage-y += sdram.c romstage-y += sdram.c
romstage-y += ../common/spi.c romstage-y += ../common/spi.c
romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c romstage-y += ../common/uart.c
romstage-y += clock.c romstage-y += clock.c
romstage-y += ../common/pwm.c romstage-y += ../common/pwm.c
romstage-y += timer.c romstage-y += timer.c
@ -64,7 +62,7 @@ romstage-y += ../common/i2c.c
ramstage-y += ../common/cbmem.c ramstage-y += ../common/cbmem.c
ramstage-y += sdram.c ramstage-y += sdram.c
ramstage-y += ../common/spi.c ramstage-y += ../common/spi.c
ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c ramstage-y += ../common/uart.c
ramstage-y += clock.c ramstage-y += clock.c
ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display.c ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display.c
ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/edp.c ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/edp.c

12
src/soc/samsung/exynos5250/Makefile.inc
View File

@ -4,11 +4,9 @@ bootblock-y += spi.c alternate_cbfs.c
bootblock-y += bootblock.c bootblock-y += bootblock.c
bootblock-y += pinmux.c timer.c power.c bootblock-y += pinmux.c timer.c power.c
# Clock is required for UART # Clock is required for UART
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c bootblock-y += clock_init.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c bootblock-y += clock.c
ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-y += uart.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
endif
bootblock-y += wakeup.c bootblock-y += wakeup.c
bootblock-y += gpio.c bootblock-y += gpio.c
@ -20,7 +18,7 @@ romstage-y += dmc_common.c
romstage-y += dmc_init_ddr3.c romstage-y += dmc_init_ddr3.c
romstage-y += power.c romstage-y += power.c
romstage-y += timer.c romstage-y += timer.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c romstage-y += uart.c
romstage-y += wakeup.c romstage-y += wakeup.c
romstage-y += gpio.c romstage-y += gpio.c
romstage-y += trustzone.c romstage-y += trustzone.c
@ -33,7 +31,7 @@ ramstage-y += clock.c
ramstage-y += clock_init.c ramstage-y += clock_init.c
ramstage-y += pinmux.c ramstage-y += pinmux.c
ramstage-y += power.c ramstage-y += power.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += uart.c
ramstage-y += cpu.c ramstage-y += cpu.c
ramstage-y += tmu.c ramstage-y += tmu.c
ramstage-y += timer.c ramstage-y += timer.c

12
src/soc/samsung/exynos5420/Makefile.inc
View File

@ -4,11 +4,9 @@ bootblock-y += spi.c alternate_cbfs.c
bootblock-y += bootblock.c bootblock-y += bootblock.c
bootblock-y += pinmux.c timer.c power.c bootblock-y += pinmux.c timer.c power.c
# Clock is required for UART # Clock is required for UART
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c bootblock-y += clock_init.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c bootblock-y += clock.c
ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-y += uart.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
endif
bootblock-y += wakeup.c bootblock-y += wakeup.c
bootblock-y += gpio.c bootblock-y += gpio.c
@ -21,7 +19,7 @@ romstage-y += dmc_common.c
romstage-y += dmc_init_ddr3.c romstage-y += dmc_init_ddr3.c
romstage-y += power.c romstage-y += power.c
romstage-y += timer.c romstage-y += timer.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c romstage-y += uart.c
romstage-y += wakeup.c romstage-y += wakeup.c
romstage-y += gpio.c romstage-y += gpio.c
romstage-y += i2c.c romstage-y += i2c.c
@ -34,7 +32,7 @@ ramstage-y += clock.c
ramstage-y += clock_init.c ramstage-y += clock_init.c
ramstage-y += pinmux.c ramstage-y += pinmux.c
ramstage-y += power.c ramstage-y += power.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += uart.c
ramstage-y += cpu.c ramstage-y += cpu.c
ramstage-y += tmu.c ramstage-y += tmu.c
ramstage-y += timer.c ramstage-y += timer.c