Add new ec subdir for Embedded Controllers and common ACPI EC support
Adds a new src/ec subdir for embedded controllers (mostly found in laptops) and converts Getac P470 and Roda RK886EX to use the new ACPI EC instead of having their own copies of those functions. Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6304 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Sven Schnelle
Peter Stuge
parent
4096fc5372
commit
7592e8bd9c
2
Makefile
2
Makefile
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@ -123,7 +123,7 @@ export MAINBOARDDIR
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PLATFORM-y += src/arch/$(ARCHDIR-y) src/cpu src/mainboard/$(MAINBOARDDIR)
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TARGETS-y :=
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BUILD-y := src/lib src/boot src/console src/devices src/southbridge src/northbridge src/superio src/drivers
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BUILD-y := src/lib src/boot src/console src/devices src/ec src/southbridge src/northbridge src/superio src/drivers
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BUILD-y += util/cbfstool util/sconfig
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BUILD-$(CONFIG_ARCH_X86) += src/pc80
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@ -124,6 +124,8 @@ comment "Super I/O"
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source src/superio/Kconfig
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comment "Devices"
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source src/devices/Kconfig
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comment "Embedded Controllers"
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source src/ec/Kconfig
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endmenu
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@ -0,0 +1 @@
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source src/ec/acpi/Kconfig
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@ -0,0 +1 @@
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subdirs-y += acpi
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@ -0,0 +1,4 @@
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config EC_ACPI
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bool
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help
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ACPI Embedded Controller interface. Mostly found in laptops.
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@ -0,0 +1,2 @@
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ramstage-y += ec.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += ec.c
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@ -20,6 +20,7 @@
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <arch/io.h>
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#include <delay.h>
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#include "ec.h"
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@ -112,3 +113,6 @@ int ec_write(u8 addr, u8 data)
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return send_ec_data(data);
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}
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struct chip_operations ec_acpi_ops = {
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CHIP_NAME("ACPI Embedded Controller")
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};
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@ -17,8 +17,8 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef _MAINBOARD_EC_H
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#define _MAINBOARD_EC_H
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#ifndef _EC_ACPI_H
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#define _EC_ACPI_H
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#define EC_DATA 0x62
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#define EC_SC 0x66
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@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select SOUTHBRIDGE_TI_PCIXX12
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select SUPERIO_SMSC_FDC37N972
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select SUPERIO_SMSC_SIO10N268
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select EC_ACPI
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select BOARD_HAS_FADT
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select HAVE_ACPI_TABLES
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select HAVE_PIRQ_TABLE
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@ -135,6 +135,8 @@ chip northbridge/intel/i945
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end
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device pnp 4e.b off # HWM
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end
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chip ec/acpi
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end
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end
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end
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@ -22,113 +22,8 @@
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#include <console/console.h>
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#include <arch/io.h>
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#include <delay.h>
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#include "ec.h"
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int send_ec_command(u8 command)
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{
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int timeout;
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timeout = 0x7ff;
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while ((inb(EC_SC) & EC_IBF) && --timeout) {
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udelay(10);
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if ((timeout & 0xff) == 0)
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printk(BIOS_SPEW, ".");
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}
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if (!timeout) {
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printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n",
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command);
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// return -1;
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}
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outb(command, EC_SC);
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return 0;
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}
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int send_ec_data(u8 data)
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{
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int timeout;
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timeout = 0x7ff;
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while ((inb(EC_SC) & EC_IBF) && --timeout) { // wait for IBF = 0
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udelay(10);
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if ((timeout & 0xff) == 0)
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printk(BIOS_SPEW, ".");
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}
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if (!timeout) {
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printk(BIOS_DEBUG, "Timeout while sending data 0x%02x to EC!\n",
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data);
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// return -1;
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}
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outb(data, EC_DATA);
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return 0;
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}
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int send_ec_data_nowait(u8 data)
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{
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outb(data, EC_DATA);
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return 0;
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}
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u8 recv_ec_data(void)
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{
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int timeout;
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u8 data;
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timeout = 0x7fff;
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while (--timeout) { // Wait for OBF = 1
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if (inb(EC_SC) & EC_OBF) {
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break;
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}
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udelay(10);
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if ((timeout & 0xff) == 0)
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printk(BIOS_SPEW, ".");
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}
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if (!timeout) {
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printk(BIOS_DEBUG, "\nTimeout while receiving data from EC!\n");
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// return -1;
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}
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data = inb(EC_DATA);
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printk(BIOS_SPEW, "recv_ec_data: 0x%02x\n", data);
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return data;
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}
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u8 ec_read(u8 addr)
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{
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send_ec_command(0x80);
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send_ec_data(addr);
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return recv_ec_data();
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}
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int ec_write(u8 addr, u8 data)
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{
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send_ec_command(0x81);
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send_ec_data(addr);
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return send_ec_data(data);
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}
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int ec_dump_status(void)
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{
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u8 ec_sc = inb(EC_SC);
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printk(BIOS_DEBUG, "Embedded Controller Status: ");
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if (ec_sc & (1 << 6)) printk(BIOS_DEBUG, "SMI_EVT ");
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if (ec_sc & (1 << 5)) printk(BIOS_DEBUG, "SCI_EVT ");
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if (ec_sc & (1 << 4)) printk(BIOS_DEBUG, "BURST ");
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if (ec_sc & (1 << 3)) printk(BIOS_DEBUG, "CMD ");
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if (ec_sc & (1 << 1)) printk(BIOS_DEBUG, "IBF ");
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if (ec_sc & (1 << 0)) printk(BIOS_DEBUG, "OBF ");
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printk(BIOS_DEBUG, "\n");
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return ec_sc;
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}
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/* ********************************** */
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#include <ec/acpi/ec.h>
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#include "ec_oem.h"
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int send_ec_oem_command(u8 command)
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{
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@ -19,12 +19,8 @@
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* MA 02110-1301 USA
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*/
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#ifndef _MAINBOARD_EC_H
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#define _MAINBOARD_EC_H
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#define EC_DATA 0x62
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#define EC_SC 0x66
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#ifndef _MAINBOARD_EC_OEM_H
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#define _MAINBOARD_EC_OEM_H
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#define EC_OEM_DATA 0x68
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#define EC_OEM_SC 0x6c
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@ -44,13 +40,6 @@
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#define BD_EC 0x83 // Burst Disable Embedded Controller
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#define QR_EC 0x84 // Query Embedded Controller
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int send_ec_command(u8 command);
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int send_ec_data(u8 data);
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int send_ec_data_nowait(u8 data);
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u8 recv_ec_data(void);
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u8 ec_read(u8 addr);
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int ec_write(u8 addr, u8 data);
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int send_ec_oem_command(u8 command);
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int send_ec_oem_data(u8 data);
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int send_ec_oem_data_nowait(u8 data);
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@ -28,7 +28,7 @@
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#include "chip.h"
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#include "hda_verb.h"
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#include "ec.c"
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#include "ec_oem.c"
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#define MAX_LCD_BRIGHTNESS 0xd8
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@ -25,7 +25,8 @@
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#include <cpu/x86/smm.h>
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#include "southbridge/intel/i82801gx/i82801gx.h"
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#include "southbridge/intel/i82801gx/nvs.h"
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#include "ec.c"
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#include <ec/acpi/ec.h>
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#include "ec_oem.c"
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#define MAX_LCD_BRIGHTNESS 0xd8
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@ -18,7 +18,6 @@
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##
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ramstage-y += m3885.c
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ramstage-y += ec.c
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driver-y += rtl8168.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c
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@ -106,6 +106,8 @@ chip northbridge/intel/i945
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device pnp ff.1 on # dummy address
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end
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end
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chip ec/acpi
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end
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end
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#device pci 1f.1 off end # IDE
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@ -25,7 +25,7 @@
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#include <arch/io.h>
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#include <delay.h>
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#include "ec.h"
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#include <ec/acpi/ec.h>
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#include "m3885.h"
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#define TH0LOW 80
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@ -30,7 +30,7 @@
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#include <arch/coreboot_tables.h>
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#include "chip.h"
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#include "ec.h"
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#include <ec/acpi/ec.h>
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#include "m3885.h"
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#define DUMP_RUNTIME_REGISTERS 0
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