soc/intel/alderlake: add chipset devicetree for ADL-S
Add chipset devicetree and power limits for AlderLake-S platform. Based on Intel docs #619501, #619362 and #626343. Change-Id: I1dd72465c458b718ecfcb29c2f7e433a63b89807 Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com> Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63493 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: ron minnich <rminnich@gmail.com>
This commit is contained in:
Michał Kopeć
Michał Żygowski
parent
a08f509cc5
commit
75a49fe856
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@ -177,6 +177,7 @@ config FSP_TEMP_RAM_SIZE
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config CHIPSET_DEVICETREE
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string
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default "soc/intel/alderlake/chipset_pch_s.cb" if SOC_INTEL_ALDERLAKE_PCH_S
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default "soc/intel/alderlake/chipset.cb"
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config EXT_BIOS_WIN_BASE
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@ -33,6 +33,15 @@ enum soc_intel_alderlake_power_limits {
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ADL_N_081_15W_CORE,
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ADL_N_041_6W_CORE,
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ADL_N_021_6W_CORE,
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ADL_S_882_35W_CORE,
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ADL_S_882_65W_CORE,
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ADL_S_882_125W_CORE,
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ADL_S_842_35W_CORE,
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ADL_S_842_65W_CORE,
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ADL_S_842_125W_CORE,
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ADL_S_642_125W_CORE,
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ADL_S_602_35W_CORE,
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ADL_S_602_65W_CORE,
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ADL_POWER_LIMITS_COUNT
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};
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@ -43,7 +52,10 @@ enum soc_intel_alderlake_cpu_tdps {
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TDP_12W = 12,
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TDP_15W = 15,
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TDP_28W = 28,
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TDP_45W = 45
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TDP_35W = 35,
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TDP_45W = 45,
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TDP_65W = 65,
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TDP_125W = 125
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};
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/* Mapping of different SKUs based on CPU ID and TDP values */
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@ -69,6 +81,15 @@ static const struct {
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{ PCI_DID_INTEL_ADL_N_ID_2, ADL_N_041_6W_CORE, TDP_6W },
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{ PCI_DID_INTEL_ADL_N_ID_3, ADL_N_041_6W_CORE, TDP_6W },
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{ PCI_DID_INTEL_ADL_N_ID_4, ADL_N_021_6W_CORE, TDP_6W },
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{ PCI_DID_INTEL_ADL_S_ID_1, ADL_S_882_35W_CORE, TDP_35W },
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{ PCI_DID_INTEL_ADL_S_ID_1, ADL_S_882_65W_CORE, TDP_65W },
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{ PCI_DID_INTEL_ADL_S_ID_1, ADL_S_882_125W_CORE, TDP_125W },
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{ PCI_DID_INTEL_ADL_S_ID_3, ADL_S_842_35W_CORE, TDP_35W },
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{ PCI_DID_INTEL_ADL_S_ID_3, ADL_S_842_65W_CORE, TDP_65W },
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{ PCI_DID_INTEL_ADL_S_ID_3, ADL_S_842_125W_CORE, TDP_125W },
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{ PCI_DID_INTEL_ADL_S_ID_8, ADL_S_642_125W_CORE, TDP_125W },
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{ PCI_DID_INTEL_ADL_S_ID_10, ADL_S_602_35W_CORE, TDP_35W },
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{ PCI_DID_INTEL_ADL_S_ID_10, ADL_S_602_65W_CORE, TDP_65W },
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};
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/* Types of display ports */
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@ -0,0 +1,217 @@
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chip soc/intel/alderlake
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device cpu_cluster 0 on end
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register "power_limits_config[ADL_S_882_35W_CORE]" = "{
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.tdp_pl1_override = 35,
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.tdp_pl2_override = 106,
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.tdp_pl4 = 177,
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}"
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register "power_limits_config[ADL_S_882_65W_CORE]" = "{
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.tdp_pl1_override = 65,
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.tdp_pl2_override = 202,
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.tdp_pl4 = 311,
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}"
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register "power_limits_config[ADL_S_882_125W_CORE]" = "{
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.tdp_pl1_override = 125,
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.tdp_pl2_override = 241,
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.tdp_pl4 = 359,
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}"
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register "power_limits_config[ADL_S_842_35W_CORE]" = "{
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.tdp_pl1_override = 35,
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.tdp_pl2_override = 99,
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.tdp_pl4 = 140,
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}"
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register "power_limits_config[ADL_S_842_65W_CORE]" = "{
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.tdp_pl1_override = 65,
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.tdp_pl2_override = 180,
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.tdp_pl4 = 260,
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}"
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register "power_limits_config[ADL_S_842_125W_CORE]" = "{
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.tdp_pl1_override = 125,
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.tdp_pl2_override = 190,
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.tdp_pl4 = 280,
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}"
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register "power_limits_config[ADL_S_642_125W_CORE]" = "{
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.tdp_pl1_override = 125,
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.tdp_pl2_override = 150,
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.tdp_pl4 = 230,
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}"
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register "power_limits_config[ADL_S_602_35W_CORE]" = "{
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.tdp_pl1_override = 35,
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.tdp_pl2_override = 74,
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.tdp_pl4 = 112,
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}"
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register "power_limits_config[ADL_S_602_65W_CORE]" = "{
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.tdp_pl1_override = 65,
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.tdp_pl2_override = 117,
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.tdp_pl4 = 176,
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}"
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# NOTE: if any variant wants to override this value, use the same format
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# as register "common_soc_config.pch_thermal_trip" = "value", instead of
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# putting it under register "common_soc_config" in overridetree.cb file.
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register "common_soc_config.pch_thermal_trip" = "100"
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device domain 0 on
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device gpio 0 alias pch_gpio on end
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device pci 00.0 alias system_agent on end
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device pci 01.0 alias pcie5_0 off end
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device pci 01.1 alias pcie5_1 off end
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device pci 02.0 alias igpu off end
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device pci 04.0 alias dtt off end
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device pci 06.0 alias pcie4_0 off end
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device pci 08.0 alias gna off end
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device pci 09.0 alias north_tracehub off end
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device pci 0a.0 alias crashlog on end
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device pci 0e.0 alias vmd off end
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device pci 11.0 alias uart3 off end
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device pci 12.0 alias ish off end
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device pci 12.6 alias gspi2 off end
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device pci 13.0 alias gspi3 off end
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device pci 14.0 alias xhci off
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chip drivers/usb/acpi
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register "type" = "UPC_TYPE_HUB"
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device usb 0.0 alias xhci_root_hub off
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chip drivers/usb/acpi
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device usb 2.0 alias usb2_port1 off end
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end
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chip drivers/usb/acpi
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device usb 2.1 alias usb2_port2 off end
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end
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chip drivers/usb/acpi
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device usb 2.2 alias usb2_port3 off end
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end
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chip drivers/usb/acpi
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device usb 2.3 alias usb2_port4 off end
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end
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chip drivers/usb/acpi
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device usb 2.4 alias usb2_port5 off end
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end
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chip drivers/usb/acpi
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device usb 2.5 alias usb2_port6 off end
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end
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chip drivers/usb/acpi
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device usb 2.6 alias usb2_port7 off end
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end
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chip drivers/usb/acpi
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device usb 2.7 alias usb2_port8 off end
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end
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chip drivers/usb/acpi
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device usb 2.8 alias usb2_port9 off end
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end
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chip drivers/usb/acpi
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device usb 2.9 alias usb2_port10 off end
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end
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chip drivers/usb/acpi
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device usb 2.a alias usb2_port11 off end
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end
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chip drivers/usb/acpi
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device usb 2.b alias usb2_port12 off end
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end
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chip drivers/usb/acpi
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device usb 2.c alias usb2_port13 off end
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end
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chip drivers/usb/acpi
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device usb 2.d alias usb2_port14 off end
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end
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chip drivers/usb/acpi
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device usb 3.0 alias usb3_port1 off end
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end
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chip drivers/usb/acpi
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device usb 3.1 alias usb3_port2 off end
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end
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chip drivers/usb/acpi
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device usb 3.2 alias usb3_port3 off end
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end
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chip drivers/usb/acpi
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device usb 3.3 alias usb3_port4 off end
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end
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chip drivers/usb/acpi
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device usb 3.4 alias usb3_port5 off end
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end
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chip drivers/usb/acpi
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device usb 3.5 alias usb3_port6 off end
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end
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chip drivers/usb/acpi
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device usb 3.6 alias usb3_port7 off end
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end
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chip drivers/usb/acpi
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device usb 3.7 alias usb3_port8 off end
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end
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chip drivers/usb/acpi
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device usb 3.8 alias usb3_port9 off end
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end
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chip drivers/usb/acpi
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device usb 3.9 alias usb3_port10 off end
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end
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end
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end
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end
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device pci 14.1 alias xdci off end
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device pci 14.2 alias shared_sram off end
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device pci 14.3 alias cnvi_wifi off end
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device pci 15.0 alias i2c0 off end
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device pci 15.1 alias i2c1 off end
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device pci 15.2 alias i2c2 off end
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device pci 15.3 alias i2c3 off end
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device pci 16.0 alias heci1 on end
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device pci 16.1 alias heci2 off end
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device pci 16.2 alias ide_r off end
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device pci 16.3 alias kt off end
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device pci 16.4 alias heci3 off end
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device pci 16.5 alias heci4 off end
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device pci 17.0 alias sata off end
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device pci 19.0 alias i2c4 off end
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device pci 19.1 alias i2c5 off end
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device pci 19.2 alias uart2 off end
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device pci 1a.0 alias pcie_rp25 off end
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device pci 1a.1 alias pcie_rp26 off end
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device pci 1a.2 alias pcie_rp27 off end
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device pci 1a.3 alias pcie_rp28 off end
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device pci 1b.0 alias pcie_rp17 off end
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device pci 1b.1 alias pcie_rp18 off end
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device pci 1b.2 alias pcie_rp19 off end
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device pci 1b.3 alias pcie_rp20 off end
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device pci 1b.4 alias pcie_rp21 off end
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device pci 1b.5 alias pcie_rp22 off end
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device pci 1b.6 alias pcie_rp23 off end
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device pci 1b.7 alias pcie_rp24 off end
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device pci 1c.0 alias pcie_rp1 off end
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device pci 1c.1 alias pcie_rp2 off end
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device pci 1c.2 alias pcie_rp3 off end
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device pci 1c.3 alias pcie_rp4 off end
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device pci 1c.4 alias pcie_rp5 off end
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device pci 1c.5 alias pcie_rp6 off end
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device pci 1c.6 alias pcie_rp7 off end
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device pci 1c.7 alias pcie_rp8 off end
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device pci 1d.0 alias pcie_rp9 off end
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device pci 1d.1 alias pcie_rp10 off end
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device pci 1d.2 alias pcie_rp11 off end
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device pci 1d.3 alias pcie_rp12 off end
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device pci 1d.4 alias pcie_rp13 off end
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device pci 1d.5 alias pcie_rp14 off end
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device pci 1d.6 alias pcie_rp15 off end
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device pci 1d.7 alias pcie_rp16 off end
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device pci 1e.0 alias uart0 off end
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device pci 1e.1 alias uart1 off end
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device pci 1e.2 alias gspi0 off end
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device pci 1e.3 alias gspi1 off end
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device pci 1f.0 alias pch_espi on end
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device pci 1f.1 alias p2sb off end
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device pci 1f.2 alias pmc hidden end
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device pci 1f.3 alias hda off end
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device pci 1f.4 alias smbus off end
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device pci 1f.5 alias fast_spi on end
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device pci 1f.6 alias gbe off end
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device pci 1f.7 alias south_tracehub off end
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end
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end
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@ -599,6 +599,11 @@ static void fill_fsps_igd_params(FSP_S_CONFIG *s_cfg,
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s_cfg->PavpEnable = CONFIG(PAVP);
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}
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WEAK_DEV_PTR(tcss_usb3_port1);
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WEAK_DEV_PTR(tcss_usb3_port2);
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WEAK_DEV_PTR(tcss_usb3_port3);
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WEAK_DEV_PTR(tcss_usb3_port4);
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static void fill_fsps_tcss_params(FSP_S_CONFIG *s_cfg,
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const struct soc_intel_alderlake_config *config)
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{
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