pci_mmio_cfg: Rename pcicfg to pci_map_bus
Rename pcicfg to pci_map_bus and add prototype for the platforms not supporting ECAM. Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Change-Id: Id9517c5ec4fa6b7c7a34552bfdc6d509927f6730 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59702 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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@ -40,11 +40,17 @@ union pci_bank {
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extern u8 *const pci_mmconf;
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extern u8 *const pci_mmconf;
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static __always_inline
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static __always_inline
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volatile union pci_bank *pcicfg(pci_devfn_t dev)
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volatile union pci_bank *pci_map_bus(pci_devfn_t dev)
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{
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{
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return (void *)&pci_mmconf[PCI_DEVFN_OFFSET(dev)];
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return (void *)&pci_mmconf[PCI_DEVFN_OFFSET(dev)];
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}
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}
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#else
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/* For platforms not supporting ECAM, they need to define pci_map_bus function
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* in their platform-specific code */
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volatile union pci_bank *pci_map_bus(pci_devfn_t dev);
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#endif
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#endif
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/*
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/*
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@ -56,37 +62,37 @@ volatile union pci_bank *pcicfg(pci_devfn_t dev)
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static __always_inline
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static __always_inline
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uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg)
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uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg)
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{
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{
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return pcicfg(dev)->reg8[reg];
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return pci_map_bus(dev)->reg8[reg];
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}
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}
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static __always_inline
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static __always_inline
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uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t reg)
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uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t reg)
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{
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{
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return pcicfg(dev)->reg16[reg / sizeof(uint16_t)];
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return pci_map_bus(dev)->reg16[reg / sizeof(uint16_t)];
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}
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}
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static __always_inline
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static __always_inline
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uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg)
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uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg)
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{
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{
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return pcicfg(dev)->reg32[reg / sizeof(uint32_t)];
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return pci_map_bus(dev)->reg32[reg / sizeof(uint32_t)];
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}
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}
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static __always_inline
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static __always_inline
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void pci_s_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
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void pci_s_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
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{
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{
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pcicfg(dev)->reg8[reg] = value;
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pci_map_bus(dev)->reg8[reg] = value;
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}
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}
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static __always_inline
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static __always_inline
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void pci_s_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
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void pci_s_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
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{
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{
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pcicfg(dev)->reg16[reg / sizeof(uint16_t)] = value;
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pci_map_bus(dev)->reg16[reg / sizeof(uint16_t)] = value;
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}
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}
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static __always_inline
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static __always_inline
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void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
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void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
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{
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{
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pcicfg(dev)->reg32[reg / sizeof(uint32_t)] = value;
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pci_map_bus(dev)->reg32[reg / sizeof(uint32_t)] = value;
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}
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}
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/*
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/*
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@ -98,19 +104,19 @@ void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
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static __always_inline
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static __always_inline
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uint8_t *pci_mmio_config8_addr(pci_devfn_t dev, uint16_t reg)
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uint8_t *pci_mmio_config8_addr(pci_devfn_t dev, uint16_t reg)
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{
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{
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return (uint8_t *)&pcicfg(dev)->reg8[reg];
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return (uint8_t *)&pci_map_bus(dev)->reg8[reg];
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}
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}
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static __always_inline
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static __always_inline
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uint16_t *pci_mmio_config16_addr(pci_devfn_t dev, uint16_t reg)
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uint16_t *pci_mmio_config16_addr(pci_devfn_t dev, uint16_t reg)
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{
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{
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return (uint16_t *)&pcicfg(dev)->reg16[reg / sizeof(uint16_t)];
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return (uint16_t *)&pci_map_bus(dev)->reg16[reg / sizeof(uint16_t)];
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}
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}
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static __always_inline
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static __always_inline
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uint32_t *pci_mmio_config32_addr(pci_devfn_t dev, uint16_t reg)
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uint32_t *pci_mmio_config32_addr(pci_devfn_t dev, uint16_t reg)
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{
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{
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return (uint32_t *)&pcicfg(dev)->reg32[reg / sizeof(uint32_t)];
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return (uint32_t *)&pci_map_bus(dev)->reg32[reg / sizeof(uint32_t)];
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}
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}
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#endif /* _PCI_MMIO_CFG_H */
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#endif /* _PCI_MMIO_CFG_H */
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