diff --git a/src/soc/intel/skylake/include/soc/gpio.h b/src/soc/intel/skylake/include/soc/gpio.h
index 75d8abe63a..c0e37db91e 100644
--- a/src/soc/intel/skylake/include/soc/gpio.h
+++ b/src/soc/intel/skylake/include/soc/gpio.h
@@ -152,12 +152,23 @@ void gpio_configure_pads(const struct pad_config *cfgs, size_t num);
 	_DW0_VALS(rst_, RAW, NO, LEVEL, NO, YES, YES, NO, NO, NO, GPIO, NO, \
 		  YES))
 
+/* General purpose input passed through to IOxAPIC. This assumes edge
+ * triggered events. */
+#define PAD_CFG_GPI_APIC_EDGE(pad_, term_, rst_) \
+	_PAD_CFG(pad_, term_, \
+	_DW0_VALS(rst_, RAW, NO, EDGE, NO, NO, YES, NO, NO, NO, GPIO, NO, YES))
+
 /* General purpose input routed to SCI. This assumes edge triggered events. */
 #define PAD_CFG_GPI_ACPI_SCI(pad_, term_, rst_, inv_) \
 	_PAD_CFG_ATTRS(pad_, term_, \
 	_DW0_VALS(rst_, RAW, NO, EDGE, NO, inv_, \
 		NO, YES, NO, NO, GPIO, NO, YES), PAD_FIELD(HOSTSW, ACPI))
 
+#define PAD_CFG_GPI_ACPI_SCI_LEVEL(pad_, term_, rst_, inv_) \
+	_PAD_CFG_ATTRS(pad_, term_, \
+	_DW0_VALS(rst_, RAW, NO, LEVEL, NO, inv_, \
+		NO, YES, NO, NO, GPIO, NO, YES), PAD_FIELD(HOSTSW, ACPI))
+
 /* General purpose input routed to SMI. This assumes edge triggered events. */
 #define PAD_CFG_GPI_ACPI_SMI(pad_, term_, rst_, inv_) \
 	_PAD_CFG_ATTRS(pad_, term_, \