soc/intel/common/gpio_defs: Fix coding style
Tested with BUILD_TIMELESS=1, Kontron COMe-mAL10 on T10-TNI carrierboard does not change. Change-Id: Ib4b4c28153398b6275728b28bda90e527d97e823 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41035 Reviewed-by: Andrey Petrov <andrey.petrov@gmail.com> Reviewed-by: Michael Niewöhner Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -133,7 +133,7 @@
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#define PAD_CFG0_BUF_NO_DISABLE (0)
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#define PAD_CFG0_BUF_NO_DISABLE (0)
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#define PAD_CFG0_BUF_TX_DISABLE PAD_CFG0_TX_DISABLE
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#define PAD_CFG0_BUF_TX_DISABLE PAD_CFG0_TX_DISABLE
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#define PAD_CFG0_BUF_RX_DISABLE PAD_CFG0_RX_DISABLE
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#define PAD_CFG0_BUF_RX_DISABLE PAD_CFG0_RX_DISABLE
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#define PAD_CFG0_BUF_TX_RX_DISABLE \
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#define PAD_CFG0_BUF_TX_RX_DISABLE \
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(PAD_CFG0_TX_DISABLE | PAD_CFG0_RX_DISABLE)
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(PAD_CFG0_TX_DISABLE | PAD_CFG0_RX_DISABLE)
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#define PAD_BUF(value) PAD_CFG0_BUF_##value
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#define PAD_BUF(value) PAD_CFG0_BUF_##value
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@ -146,17 +146,17 @@
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#define PAD_IOSTERM(value) 0
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#define PAD_IOSTERM(value) 0
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#endif
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#endif
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#define PAD_IRQ_CFG(route, trig, inv) \
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#define PAD_IRQ_CFG(route, trig, inv) \
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(PAD_IRQ_ROUTE(route) | \
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(PAD_IRQ_ROUTE(route) | \
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PAD_TRIG(trig) | \
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PAD_TRIG(trig) | \
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PAD_RX_POL(inv))
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PAD_RX_POL(inv))
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#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT)
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#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT)
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#define PAD_IRQ_CFG_DUAL_ROUTE(route1, route2, trig, inv) \
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#define PAD_IRQ_CFG_DUAL_ROUTE(route1, route2, trig, inv) \
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(PAD_IRQ_ROUTE(route1) | \
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(PAD_IRQ_ROUTE(route1) | \
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PAD_IRQ_ROUTE(route2) | \
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PAD_IRQ_ROUTE(route2) | \
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PAD_TRIG(trig) | \
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PAD_TRIG(trig) | \
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PAD_RX_POL(inv))
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PAD_RX_POL(inv))
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#endif /* CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT */
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#endif /* CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT */
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#define _PAD_CFG_STRUCT(__pad, __config0, __config1) \
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#define _PAD_CFG_STRUCT(__pad, __config0, __config1) \
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@ -180,121 +180,130 @@
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#endif
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#endif
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/* Native function configuration */
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/* Native function configuration */
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#define PAD_CFG_NF(pad, pull, rst, func) \
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#define PAD_CFG_NF(pad, pull, rst, func) \
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_PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull) | \
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_PAD_CFG_STRUCT(pad, \
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PAD_IOSSTATE(TxLASTRxE))
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PAD_RESET(rst) | PAD_FUNC(func), \
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PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE))
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/*
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/*
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* Set native function with RX Level/Edge configuration and disable
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* Set native function with RX Level/Edge configuration and disable
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* input/output buffer if necessary
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* input/output buffer if necessary
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*/
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*/
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#define PAD_CFG_NF_BUF_TRIG(pad, pull, rst, func, bufdis, trig) \
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#define PAD_CFG_NF_BUF_TRIG(pad, pull, rst, func, bufdis, trig) \
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_PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_TRIG(trig) | \
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_PAD_CFG_STRUCT(pad, \
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PAD_BUF(bufdis) | PAD_FUNC(func), \
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PAD_RESET(rst) | PAD_TRIG(trig) | \
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PAD_BUF(bufdis) | PAD_FUNC(func), \
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PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE))
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PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE))
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#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL)
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#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL)
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/* Native 1.8V tolerant pad, only applies to some pads like I2C/I2S
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/* Native 1.8V tolerant pad, only applies to some pads like I2C/I2S
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Not applicable to all SOCs. Refer EDS
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Not applicable to all SOCs. Refer EDS
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*/
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*/
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#define PAD_CFG_NF_1V8(pad, pull, rst, func) \
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#define PAD_CFG_NF_1V8(pad, pull, rst, func) \
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_PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull) |\
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_PAD_CFG_STRUCT(pad, \
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PAD_IOSSTATE(TxLASTRxE) | PAD_CFG1_TOL_1V8)
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PAD_RESET(rst) | PAD_FUNC(func), \
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PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE) | PAD_CFG1_TOL_1V8)
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#endif
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#endif
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/* Native function configuration for standby state */
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/* Native function configuration for standby state */
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#define PAD_CFG_NF_IOSSTATE(pad, pull, rst, func, iosstate) \
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#define PAD_CFG_NF_IOSSTATE(pad, pull, rst, func, iosstate) \
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_PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull) | \
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_PAD_CFG_STRUCT(pad, \
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PAD_IOSSTATE(iosstate))
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PAD_RESET(rst) | PAD_FUNC(func), \
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PAD_PULL(pull) | PAD_IOSSTATE(iosstate))
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/* Native function configuration for standby state, also configuring
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/* Native function configuration for standby state, also configuring
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iostandby as masked */
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iostandby as masked */
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#define PAD_CFG_NF_IOSTANDBY_IGNORE(pad, pull, rst, func) \
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#define PAD_CFG_NF_IOSTANDBY_IGNORE(pad, pull, rst, func) \
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_PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull) | \
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_PAD_CFG_STRUCT(pad, \
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PAD_IOSSTATE(IGNORE))
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PAD_RESET(rst) | PAD_FUNC(func), \
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PAD_PULL(pull) | PAD_IOSSTATE(IGNORE))
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/* Native function configuration for standby state, also configuring
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/* Native function configuration for standby state, also configuring
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iosstate and iosterm */
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iosstate and iosterm */
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#define PAD_CFG_NF_IOSSTATE_IOSTERM(pad, pull, rst, func, iosstate, iosterm) \
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#define PAD_CFG_NF_IOSSTATE_IOSTERM(pad, pull, rst, func, iosstate, iosterm) \
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_PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull) | \
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_PAD_CFG_STRUCT(pad, \
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PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull) | \
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PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
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PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
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/* Configure native function, iosstate, iosterm and disable input/output buffer */
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/* Configure native function, iosstate, iosterm and disable input/output buffer */
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#define PAD_CFG_NF_BUF_IOSSTATE_IOSTERM(pad, pull, rst, func, bufdis, iosstate, iosterm) \
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#define PAD_CFG_NF_BUF_IOSSTATE_IOSTERM(pad, pull, rst, func, bufdis, iosstate, iosterm) \
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_PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_BUF(bufdis) | PAD_FUNC(func), \
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_PAD_CFG_STRUCT(pad, \
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PAD_RESET(rst) | PAD_BUF(bufdis) | PAD_FUNC(func), \
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PAD_PULL(pull) | PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
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PAD_PULL(pull) | PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
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/* General purpose output, no pullup/down. */
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/* General purpose output, no pullup/down. */
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#define PAD_CFG_GPO(pad, val, rst) \
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#define PAD_CFG_GPO(pad, val, rst) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | \
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PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \
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PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \
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PAD_PULL(NONE) | PAD_IOSSTATE(TxLASTRxE))
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PAD_PULL(NONE) | PAD_IOSSTATE(TxLASTRxE))
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/* General purpose output, with termination specified */
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/* General purpose output, with termination specified */
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#define PAD_CFG_TERM_GPO(pad, val, pull, rst) \
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#define PAD_CFG_TERM_GPO(pad, val, pull, rst) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | \
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PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \
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PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \
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PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE))
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PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE))
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/* General purpose output, no pullup/down. */
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/* General purpose output, no pullup/down. */
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#define PAD_CFG_GPO_GPIO_DRIVER(pad, val, rst, pull) \
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#define PAD_CFG_GPO_GPIO_DRIVER(pad, val, rst, pull) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | \
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PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \
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PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \
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PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE) | PAD_CFG_OWN_GPIO(DRIVER))
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PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE) | \
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PAD_CFG_OWN_GPIO(DRIVER))
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/* General purpose output. */
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/* General purpose output. */
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#define PAD_CFG_GPO_IOSSTATE_IOSTERM(pad, val, rst, pull, iosstate, ioterm) \
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#define PAD_CFG_GPO_IOSSTATE_IOSTERM(pad, val, rst, pull, iosstate, ioterm) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | \
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PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \
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PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \
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PAD_PULL(pull) | PAD_IOSSTATE(iosstate) | PAD_IOSTERM(ioterm))
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PAD_PULL(pull) | PAD_IOSSTATE(iosstate) | PAD_IOSTERM(ioterm))
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/* General purpose input */
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/* General purpose input */
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#define PAD_CFG_GPI(pad, pull, rst) \
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#define PAD_CFG_GPI(pad, pull, rst) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE), \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE), \
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PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE))
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PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE))
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#define PAD_CFG_GPI_IOSSTATE(pad, pull, rst, iosstate) \
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#define PAD_CFG_GPI_IOSSTATE(pad, pull, rst, iosstate) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE, \
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PAD_PULL(pull) | PAD_IOSSTATE(iosstate))
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PAD_PULL(pull) | PAD_IOSSTATE(iosstate))
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#define PAD_CFG_GPI_IOSSTATE_IOSTERM(pad, pull, rst, iosstate, iosterm) \
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#define PAD_CFG_GPI_IOSSTATE_IOSTERM(pad, pull, rst, iosstate, iosterm) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE, \
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PAD_PULL(pull) | PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
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PAD_PULL(pull) | PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
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/*
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/*
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* General purpose input. The following macro sets the
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* General purpose input. The following macro sets the
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* Host Software Pad Ownership to GPIO Driver mode.
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* Host Software Pad Ownership to GPIO Driver mode.
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*/
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*/
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#define PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own) \
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#define PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own) \
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_PAD_CFG_STRUCT(pad, PAD_FUNC(GPIO) | PAD_RESET(rst) | \
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_PAD_CFG_STRUCT(pad, \
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PAD_TRIG(trig) | PAD_RX_POL(NONE) | PAD_BUF(TX_DISABLE), \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | \
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PAD_TRIG(trig) | PAD_RX_POL(NONE) | PAD_BUF(TX_DISABLE), \
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PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE) | PAD_CFG_OWN_GPIO(own))
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PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE) | PAD_CFG_OWN_GPIO(own))
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#define PAD_CFG_GPI_GPIO_DRIVER(pad, pull, rst) \
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#define PAD_CFG_GPI_GPIO_DRIVER(pad, pull, rst) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE), \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE), \
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PAD_PULL(pull) | PAD_CFG_OWN_GPIO(DRIVER) | PAD_IOSSTATE(TxDRxE))
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PAD_PULL(pull) | PAD_CFG_OWN_GPIO(DRIVER) | PAD_IOSSTATE(TxDRxE))
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#define PAD_CFG_GPIO_DRIVER_HI_Z(pad, pull, rst, iosstate, iosterm) \
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#define PAD_CFG_GPIO_DRIVER_HI_Z(pad, pull, rst, iosstate, iosterm) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_RX_DISABLE), \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_RX_DISABLE), \
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PAD_PULL(pull) | PAD_CFG_OWN_GPIO(DRIVER) | \
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PAD_PULL(pull) | PAD_CFG_OWN_GPIO(DRIVER) | \
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PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
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PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
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#define PAD_CFG_GPIO_HI_Z(pad, pull, rst, iosstate, iosterm) \
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#define PAD_CFG_GPIO_HI_Z(pad, pull, rst, iosstate, iosterm) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_RX_DISABLE), \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_RX_DISABLE), \
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PAD_PULL(pull) | PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
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PAD_PULL(pull) | PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
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/* GPIO Interrupt */
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/* GPIO Interrupt */
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#define PAD_CFG_GPI_INT(pad, pull, rst, trig) \
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#define PAD_CFG_GPI_INT(pad, pull, rst, trig) \
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PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, DRIVER)
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PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, DRIVER)
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/*
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/*
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* Both TX and RX are disabled. RX disabling is done to avoid unnecessary
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* Both TX and RX are disabled. RX disabling is done to avoid unnecessary
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* setting of GPI_STS. RX Level/Edge Trig Configuration set to disable
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* setting of GPI_STS. RX Level/Edge Trig Configuration set to disable
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*/
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*/
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#define PAD_NC(pad, pull) \
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#define PAD_NC(pad, pull) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(DEEP) | \
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PAD_FUNC(GPIO) | PAD_RESET(DEEP) | \
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PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), \
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PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), \
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PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE))
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PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE))
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#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS)
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#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS)
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#define PAD_CFG_GPI_APIC(pad, pull, rst) \
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#define PAD_CFG_GPI_APIC(pad, pull, rst) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
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PAD_IRQ_CFG(IOAPIC, LEVEL, NONE), PAD_PULL(pull))
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PAD_IRQ_CFG(IOAPIC, LEVEL, NONE), PAD_PULL(pull))
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#define PAD_CFG_GPI_APIC_INVERT(pad, pull, rst) \
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#define PAD_CFG_GPI_APIC_INVERT(pad, pull, rst) \
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_PAD_CFG_STRUCT(pad, \
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_PAD_CFG_STRUCT(pad, \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
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PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
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PAD_IRQ_CFG(IOAPIC, LEVEL, INVERT), PAD_PULL(pull))
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PAD_IRQ_CFG(IOAPIC, LEVEL, INVERT), PAD_PULL(pull))
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#define PAD_CFG_GPI_ACPI_SCI(pad, pull, rst, inv) \
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#define PAD_CFG_GPI_ACPI_SCI(pad, pull, rst, inv) \
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#else
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#else
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/* General purpose input, routed to APIC */
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/* General purpose input, routed to APIC */
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#define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv) \
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#define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv) \
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_PAD_CFG_STRUCT(pad, \
|
_PAD_CFG_STRUCT(pad, \
|
||||||
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
||||||
PAD_IRQ_CFG(IOAPIC, trig, inv), PAD_PULL(pull) | \
|
PAD_IRQ_CFG(IOAPIC, trig, inv), PAD_PULL(pull) | \
|
||||||
PAD_IOSSTATE(TxDRxE))
|
PAD_IOSSTATE(TxDRxE))
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* General purpose input, routed to APIC - with IOStandby Config*/
|
/* General purpose input, routed to APIC - with IOStandby Config*/
|
||||||
#define PAD_CFG_GPI_APIC_IOS(pad, pull, rst, trig, inv, iosstate, iosterm) \
|
#define PAD_CFG_GPI_APIC_IOS(pad, pull, rst, trig, inv, iosstate, iosterm) \
|
||||||
_PAD_CFG_STRUCT(pad, \
|
_PAD_CFG_STRUCT(pad, \
|
||||||
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
||||||
PAD_IRQ_CFG(IOAPIC, trig, inv), PAD_PULL(pull) | \
|
PAD_IRQ_CFG(IOAPIC, trig, inv), PAD_PULL(pull) | \
|
||||||
PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
|
PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -355,47 +364,47 @@
|
||||||
* on its own end. One just needs to pass an active high message into the
|
* on its own end. One just needs to pass an active high message into the
|
||||||
* ITSS.
|
* ITSS.
|
||||||
*/
|
*/
|
||||||
#define PAD_CFG_GPI_APIC_LOW(pad, pull, rst) \
|
#define PAD_CFG_GPI_APIC_LOW(pad, pull, rst) \
|
||||||
PAD_CFG_GPI_APIC(pad, pull, rst, LEVEL, INVERT)
|
PAD_CFG_GPI_APIC(pad, pull, rst, LEVEL, INVERT)
|
||||||
|
|
||||||
#define PAD_CFG_GPI_APIC_HIGH(pad, pull, rst) \
|
#define PAD_CFG_GPI_APIC_HIGH(pad, pull, rst) \
|
||||||
PAD_CFG_GPI_APIC(pad, pull, rst, LEVEL, NONE)
|
PAD_CFG_GPI_APIC(pad, pull, rst, LEVEL, NONE)
|
||||||
|
|
||||||
#define PAD_CFG_GPI_APIC_EDGE_LOW(pad, pull, rst) \
|
#define PAD_CFG_GPI_APIC_EDGE_LOW(pad, pull, rst) \
|
||||||
PAD_CFG_GPI_APIC(pad, pull, rst, EDGE_SINGLE, INVERT)
|
PAD_CFG_GPI_APIC(pad, pull, rst, EDGE_SINGLE, INVERT)
|
||||||
|
|
||||||
/* General purpose input, routed to SMI */
|
/* General purpose input, routed to SMI */
|
||||||
#define PAD_CFG_GPI_SMI(pad, pull, rst, trig, inv) \
|
#define PAD_CFG_GPI_SMI(pad, pull, rst, trig, inv) \
|
||||||
_PAD_CFG_STRUCT(pad, \
|
_PAD_CFG_STRUCT(pad, \
|
||||||
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
||||||
PAD_IRQ_CFG(SMI, trig, inv), PAD_PULL(pull) | \
|
PAD_IRQ_CFG(SMI, trig, inv), PAD_PULL(pull) | \
|
||||||
PAD_IOSSTATE(TxDRxE))
|
PAD_IOSSTATE(TxDRxE))
|
||||||
|
|
||||||
/* General purpose input, routed to SMI */
|
/* General purpose input, routed to SMI */
|
||||||
#define PAD_CFG_GPI_SMI_IOS(pad, pull, rst, trig, inv, iosstate, iosterm) \
|
#define PAD_CFG_GPI_SMI_IOS(pad, pull, rst, trig, inv, iosstate, iosterm) \
|
||||||
_PAD_CFG_STRUCT(pad, \
|
_PAD_CFG_STRUCT(pad, \
|
||||||
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
||||||
PAD_IRQ_CFG(SMI, trig, inv), PAD_PULL(pull) | \
|
PAD_IRQ_CFG(SMI, trig, inv), PAD_PULL(pull) | \
|
||||||
PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
|
PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
|
||||||
|
|
||||||
#define PAD_CFG_GPI_SMI_LOW(pad, pull, rst, trig) \
|
#define PAD_CFG_GPI_SMI_LOW(pad, pull, rst, trig) \
|
||||||
PAD_CFG_GPI_SMI(pad, pull, rst, trig, INVERT)
|
PAD_CFG_GPI_SMI(pad, pull, rst, trig, INVERT)
|
||||||
|
|
||||||
#define PAD_CFG_GPI_SMI_HIGH(pad, pull, rst, trig) \
|
#define PAD_CFG_GPI_SMI_HIGH(pad, pull, rst, trig) \
|
||||||
PAD_CFG_GPI_SMI(pad, pull, rst, trig, NONE)
|
PAD_CFG_GPI_SMI(pad, pull, rst, trig, NONE)
|
||||||
|
|
||||||
/* General purpose input, routed to SCI */
|
/* General purpose input, routed to SCI */
|
||||||
#define PAD_CFG_GPI_SCI(pad, pull, rst, trig, inv) \
|
#define PAD_CFG_GPI_SCI(pad, pull, rst, trig, inv) \
|
||||||
_PAD_CFG_STRUCT(pad, \
|
_PAD_CFG_STRUCT(pad, \
|
||||||
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
||||||
PAD_IRQ_CFG(SCI, trig, inv), PAD_PULL(pull) | \
|
PAD_IRQ_CFG(SCI, trig, inv), PAD_PULL(pull) | \
|
||||||
PAD_IOSSTATE(TxDRxE))
|
PAD_IOSSTATE(TxDRxE))
|
||||||
|
|
||||||
/* General purpose input, routed to SCI */
|
/* General purpose input, routed to SCI */
|
||||||
#define PAD_CFG_GPI_SCI_IOS(pad, pull, rst, trig, inv, iosstate, iosterm) \
|
#define PAD_CFG_GPI_SCI_IOS(pad, pull, rst, trig, inv, iosstate, iosterm) \
|
||||||
_PAD_CFG_STRUCT(pad, \
|
_PAD_CFG_STRUCT(pad, \
|
||||||
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
||||||
PAD_IRQ_CFG(SCI, trig, inv), PAD_PULL(pull) | \
|
PAD_IRQ_CFG(SCI, trig, inv), PAD_PULL(pull) | \
|
||||||
PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
|
PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
|
||||||
|
|
||||||
#define PAD_CFG_GPI_SCI_LOW(pad, pull, rst, trig) \
|
#define PAD_CFG_GPI_SCI_LOW(pad, pull, rst, trig) \
|
||||||
|
@ -404,33 +413,33 @@
|
||||||
#define PAD_CFG_GPI_SCI_HIGH(pad, pull, rst, trig) \
|
#define PAD_CFG_GPI_SCI_HIGH(pad, pull, rst, trig) \
|
||||||
PAD_CFG_GPI_SCI(pad, pull, rst, trig, NONE)
|
PAD_CFG_GPI_SCI(pad, pull, rst, trig, NONE)
|
||||||
|
|
||||||
#define PAD_CFG_GPI_SCI_DEBEN(pad, pull, rst, trig, inv, dur) \
|
#define PAD_CFG_GPI_SCI_DEBEN(pad, pull, rst, trig, inv, dur) \
|
||||||
_PAD_CFG_STRUCT_3(pad, \
|
_PAD_CFG_STRUCT_3(pad, \
|
||||||
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
||||||
PAD_IRQ_CFG(SCI, trig, inv), PAD_PULL(pull) | \
|
PAD_IRQ_CFG(SCI, trig, inv), PAD_PULL(pull) | \
|
||||||
PAD_IOSSTATE(TxDRxE), PAD_CFG2_DEBEN | PAD_CFG2_##dur)
|
PAD_IOSSTATE(TxDRxE), PAD_CFG2_DEBEN | PAD_CFG2_##dur)
|
||||||
|
|
||||||
#define PAD_CFG_GPI_SCI_LOW_DEBEN(pad, pull, rst, trig, dur) \
|
#define PAD_CFG_GPI_SCI_LOW_DEBEN(pad, pull, rst, trig, dur) \
|
||||||
PAD_CFG_GPI_SCI_DEBEN(pad, pull, rst, trig, INVERT, dur)
|
PAD_CFG_GPI_SCI_DEBEN(pad, pull, rst, trig, INVERT, dur)
|
||||||
|
|
||||||
#define PAD_CFG_GPI_SCI_HIGH_DEBEN(pad, pull, rst, trig, dur) \
|
#define PAD_CFG_GPI_SCI_HIGH_DEBEN(pad, pull, rst, trig, dur) \
|
||||||
PAD_CFG_GPI_SCI_DEBEN(pad, pull, rst, trig, NONE, dur)
|
PAD_CFG_GPI_SCI_DEBEN(pad, pull, rst, trig, NONE, dur)
|
||||||
|
|
||||||
/* General purpose input, routed to NMI */
|
/* General purpose input, routed to NMI */
|
||||||
#define PAD_CFG_GPI_NMI(pad, pull, rst, trig, inv) \
|
#define PAD_CFG_GPI_NMI(pad, pull, rst, trig, inv) \
|
||||||
_PAD_CFG_STRUCT(pad, \
|
_PAD_CFG_STRUCT(pad, \
|
||||||
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
||||||
PAD_IRQ_CFG(NMI, trig, inv), PAD_PULL(pull) | \
|
PAD_IRQ_CFG(NMI, trig, inv), PAD_PULL(pull) | \
|
||||||
PAD_IOSSTATE(TxDRxE))
|
PAD_IOSSTATE(TxDRxE))
|
||||||
|
|
||||||
#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT)
|
#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT)
|
||||||
#define PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2) \
|
#define PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2) \
|
||||||
_PAD_CFG_STRUCT(pad, \
|
_PAD_CFG_STRUCT(pad, \
|
||||||
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \
|
||||||
PAD_IRQ_CFG_DUAL_ROUTE(route1, route2, trig, inv), \
|
PAD_IRQ_CFG_DUAL_ROUTE(route1, route2, trig, inv), \
|
||||||
PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE))
|
PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE))
|
||||||
|
|
||||||
#define PAD_CFG_GPI_IRQ_WAKE(pad, pull, rst, trig, inv) \
|
#define PAD_CFG_GPI_IRQ_WAKE(pad, pull, rst, trig, inv) \
|
||||||
PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, IOAPIC, SCI)
|
PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, IOAPIC, SCI)
|
||||||
|
|
||||||
#endif /* CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT */
|
#endif /* CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT */
|
||||||
|
|
Loading…
Reference in New Issue