soc/amd/stoneyridge/gpio: Allow specifying 0 value for debounce timeout
It is possible to configure debounce, but leave it disabled by specifying a 0 value for the timeout. Add a define for allowing to do so via the PAD_DEBOUNCE() macro. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> BUG=b:113880780 BRANCH=none TEST=compile Change-Id: I9de61297b0677cc904535a51c16970eecb52021d Reviewed-on: https://review.coreboot.org/c/30998 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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@ -462,6 +462,7 @@ enum {
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#define GPIO_TIMEBASE_15560uS (1 << 7)
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#define GPIO_TIMEBASE_62440uS (GPIO_TIMEBASE_183uS | \
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GPIO_TIMEBASE_15560uS)
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#define GPIO_IN_DEBOUNCE_DISABLED (0 | GPIO_TIMEBASE_61uS)
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#define GPIO_IN_60uS (1 | GPIO_TIMEBASE_61uS)
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#define GPIO_IN_120uS (2 | GPIO_TIMEBASE_61uS)
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#define GPIO_IN_200uS (3 | GPIO_TIMEBASE_61uS)
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