device: Add a new "SPI" device type

Add support for a new "SPI" device type in the devicetree to bind a
device on the SPI bus. Allow device to provide chip select number for
the device as a parameter.

Add spi_bus_operations with operation dev_to_bus which allows SoCs to
define a translation method for converting "struct device" into a unique
SPI bus number.

BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully.

Change-Id: I86f09516d3cddd619fef23a4659c9e4eadbcf3fa
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/18340
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins)

src/device/device_util.c

@@ -250,6 +250,9 @@ u32 dev_path_encode(device_t dev)
 	case DEVICE_PATH_GENERIC:
 		ret |= dev->path.generic.subid << 8 | dev->path.generic.id;
 		break;
+	case DEVICE_PATH_SPI:
+		ret |= dev->path.spi.cs;
+		break;
 	case DEVICE_PATH_NONE:
 	default:
 		break;
@@ -319,6 +322,10 @@ const char *dev_path(device_t dev)
 				 "GENERIC: %d.%d", dev->path.generic.id,
 				 dev->path.generic.subid);
 			break;
+		case DEVICE_PATH_SPI:
+			snprintf(buffer, sizeof (buffer), "SPI: %02x",
+				 dev->path.spi.cs);
+			break;
 		default:
 			printk(BIOS_ERR, "Unknown device path type: %d\n",
 			       dev->path.type);
@@ -390,6 +397,9 @@ int path_eq(struct device_path *path1, struct device_path *path2)
 		equal = (path1->generic.id == path2->generic.id) &&
 			(path1->generic.subid == path2->generic.subid);
 		break;
+	case DEVICE_PATH_SPI:
+		equal = (path1->spi.cs == path2->spi.cs);
+		break;
 	default:
 		printk(BIOS_ERR, "Unknown device type: %d\n", path1->type);
 		break;

src/include/device/device.h

@@ -23,6 +23,7 @@ struct pci_bus_operations;
 struct i2c_bus_operations;
 struct smbus_bus_operations;
 struct pnp_mode_ops;
+struct spi_bus_operations;
 
 /* Chip operations */
 struct chip_operations {
@@ -64,6 +65,7 @@ struct device_operations {
 #endif
 	const struct pci_operations *ops_pci;
 	const struct i2c_bus_operations *ops_i2c_bus;
+	const struct spi_bus_operations *ops_spi_bus;
 	const struct smbus_bus_operations *ops_smbus_bus;
 	const struct pci_bus_operations * (*ops_pci_bus)(device_t dev);
 	const struct pnp_mode_ops *ops_pnp_mode;

src/include/device/path.h

@@ -14,6 +14,7 @@ enum device_path_type {
 	DEVICE_PATH_CPU_BUS,
 	DEVICE_PATH_IOAPIC,
 	DEVICE_PATH_GENERIC,
+	DEVICE_PATH_SPI,
 
 	/*
 	 * When adding path types to this table, please also update the
@@ -33,7 +34,8 @@ enum device_path_type {
 		"DEVICE_PATH_CPU",		\
 		"DEVICE_PATH_CPU_BUS",		\
 		"DEVICE_PATH_IOAPIC",		\
-		"DEVICE_PATH_GENERIC"		\
+		"DEVICE_PATH_GENERIC",		\
+		"DEVICE_PATH_SPI",		\
 }
 
 struct domain_path
@@ -58,6 +60,11 @@ struct i2c_path
 	unsigned mode_10bit;
 };
 
+struct spi_path
+{
+	unsigned cs;
+};
+
 struct apic_path
 {
 	unsigned apic_id;
@@ -107,6 +114,7 @@ struct device_path {
 		struct cpu_path		cpu;
 		struct cpu_bus_path	cpu_bus;
 		struct generic_path	generic;
+		struct spi_path		spi;
 	};
 };
 

src/include/device/spi.h

@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __DEVICE_SPI_H__
+#define __DEVICE_SPI_H__
+
+struct device;
+struct spi_bus_operations {
+	/*
+	 * This is a SoC-specific method that can be provided to translate the
+	 * 'struct device' for a SPI controller into a unique SPI bus
+	 * number. Returns -1 if the bus number for this bus cannot be
+	 * determined.
+	 */
+	int (*dev_to_bus)(struct device *dev);
+};
+
+#endif	/* __DEVICE_SPI_H__ */