Supermicro H8SCM & H8QGI: Fix printk warnings
Changes:
- Fix printk warnings for these two platforms by getting rid of the
l length specifier and casting to unsigned int.
This gets rid of a bunch of warnings like this one:
agesawrapper.c:279, GNU Compiler 4 (gcc), Priority: Normal
format '%lu' expects argument of type 'long unsigned int',
but argument 3 has type 'UINT32' [-Wformat]
Notes:
- This is the same change that was done for Tyan s8226 in change:
ddff32eb
- http://review.coreboot.org/#/c/2451/
Tyan S8226: Fix printk warnings
- I have not tested this change on either of these platforms, I have
just compiled it.
Change-Id: I46b4c13fde7473cd2a084c7c7cb5c893f1731b02
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/2502
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
parent
4f5a433a98
commit
7675d8a481
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@ -276,7 +276,7 @@ UINT32 agesawrapper_amdinitearly(VOID)
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GetCpuServicesOfCurrentCore((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdParamStruct.StdHeader);
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GetCpuServicesOfCurrentCore((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdParamStruct.StdHeader);
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FamilySpecificServices->GetTscRate(FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader);
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FamilySpecificServices->GetTscRate(FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader);
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printk(BIOS_DEBUG, "BSP Frequency: %luMHz\n", TscRateInMhz);
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printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz);
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AmdReleaseStruct(&AmdParamStruct);
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AmdReleaseStruct(&AmdParamStruct);
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return (UINT32)status;
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return (UINT32)status;
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@ -329,7 +329,7 @@ UINT32 agesawrapper_amdinitpost(VOID)
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GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdParamStruct.StdHeader);
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GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdParamStruct.StdHeader);
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FamilySpecificServices->GetTscRate (FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader);
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FamilySpecificServices->GetTscRate (FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader);
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printk(BIOS_DEBUG, "BSP Frequency: %luMHz\n", TscRateInMhz);
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printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz);
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return (UINT32)status;
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return (UINT32)status;
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}
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}
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@ -537,47 +537,47 @@ static void agesa_alert(EVENT_PARAMS *event)
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{
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{
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switch (event->EventInfo) {
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switch (event->EventInfo) {
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case MEM_ALERT_USER_TMG_MODE_OVERRULED:
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case MEM_ALERT_USER_TMG_MODE_OVERRULED:
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printk(BIOS_DEBUG, "Socket %lx Dct %lx Channel %lx "
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printk(BIOS_DEBUG, "Socket %x Dct %x Channel %x "
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"TIMING_MODE_SPECIFIC is requested but can not be applied to current configurations.\n",
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"TIMING_MODE_SPECIFIC is requested but can not be applied to current configurations.\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3);
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(unsigned int)event->DataParam3);
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break;
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break;
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case MEM_ALERT_ORG_MISMATCH_DIMM:
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case MEM_ALERT_ORG_MISMATCH_DIMM:
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printk(BIOS_DEBUG, "Socket %lx Dct %lx Channel %lx "
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printk(BIOS_DEBUG, "Socket %x Dct %x Channel %x "
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"DIMM organization miss-match\n",
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"DIMM organization miss-match\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3);
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(unsigned int)event->DataParam3);
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break;
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break;
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case MEM_ALERT_BK_INT_DIS:
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case MEM_ALERT_BK_INT_DIS:
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printk(BIOS_DEBUG, "Socket %lx Dct %lx Channel %lx "
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printk(BIOS_DEBUG, "Socket %x Dct %x Channel %x "
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"Bank interleaving disable for internal issue\n",
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"Bank interleaving disable for internal issue\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3);
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(unsigned int)event->DataParam3);
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break;
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break;
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case CPU_EVENT_BIST_ERROR:
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case CPU_EVENT_BIST_ERROR:
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printk(BIOS_DEBUG, "BIST error: %lx reported on Socket %lx Core %lx\n",
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printk(BIOS_DEBUG, "BIST error: %x reported on Socket %x Core %x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3);
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(unsigned int)event->DataParam3);
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break;
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break;
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case HT_EVENT_HW_SYNCFLOOD:
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case HT_EVENT_HW_SYNCFLOOD:
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printk(BIOS_DEBUG, "HT_EVENT_DATA_HW_SYNCFLOOD error on Socket %lx Link %lx\n",
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printk(BIOS_DEBUG, "HT_EVENT_DATA_HW_SYNCFLOOD error on Socket %x Link %x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2);
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(unsigned int)event->DataParam2);
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break;
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break;
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case HT_EVENT_HW_HTCRC:
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case HT_EVENT_HW_HTCRC:
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printk(BIOS_DEBUG, "HT_EVENT_HW_HTCRC error on Socket %lx Link %lx Lanemask:%lx\n",
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printk(BIOS_DEBUG, "HT_EVENT_HW_HTCRC error on Socket %x Link %x Lanemask:%x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3);
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(unsigned int)event->DataParam3);
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break;
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break;
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default:
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default:
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@ -602,10 +602,10 @@ static void agesa_warning(EVENT_PARAMS *event)
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switch (event->EventInfo >> 24) {
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switch (event->EventInfo >> 24) {
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case 0x04:
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case 0x04:
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printk(BIOS_DEBUG, "Memory: Socket %lx Dct %lx Channel%lx ",
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printk(BIOS_DEBUG, "Memory: Socket %x Dct %x Channel%x ",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3);
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(unsigned int)event->DataParam3);
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break;
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break;
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case 0x08:
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case 0x08:
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@ -702,24 +702,24 @@ static void agesa_warning(EVENT_PARAMS *event)
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} else if ((event->EventInfo & 0x000000FF) == 0x03) {
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} else if ((event->EventInfo & 0x000000FF) == 0x03) {
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printk(BIOS_DEBUG, "AGESA_CACHE_REGIONS_ACROSS_4GB\n");
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printk(BIOS_DEBUG, "AGESA_CACHE_REGIONS_ACROSS_4GB\n");
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}
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}
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printk(BIOS_DEBUG, "cache region index:%lx, start:%lx size:%lx\n",
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printk(BIOS_DEBUG, "cache region index:%x, start:%x size:%x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3);
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(unsigned int)event->DataParam3);
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break;
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break;
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case CPU_WARNING_ADJUSTED_LEVELING_MODE:
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case CPU_WARNING_ADJUSTED_LEVELING_MODE:
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printk(BIOS_DEBUG, "CPU_WARNING_ADJUSTED_LEVELING_MODE "
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printk(BIOS_DEBUG, "CPU_WARNING_ADJUSTED_LEVELING_MODE "
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"requested: %lx, actual level:%lx\n",
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"requested: %x, actual level:%x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2);
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(unsigned int)event->DataParam2);
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break;
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break;
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case CPU_EVENT_PM_PSTATE_OVERCURRENT:
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case CPU_EVENT_PM_PSTATE_OVERCURRENT:
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printk(BIOS_DEBUG, "CPU_EVENT_PM_PSTATE_OVERCURRENT "
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printk(BIOS_DEBUG, "CPU_EVENT_PM_PSTATE_OVERCURRENT "
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"Socket: %lx, Pstate:%lx\n",
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"Socket: %x, Pstate:%x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2);
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(unsigned int)event->DataParam2);
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break;
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break;
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case CPU_WARNING_NONOPTIMAL_HT_ASSIST_CFG:
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case CPU_WARNING_NONOPTIMAL_HT_ASSIST_CFG:
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@ -735,34 +735,34 @@ static void agesa_warning(EVENT_PARAMS *event)
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*/
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*/
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case HT_EVENT_OPT_REQUIRED_CAP_RETRY:
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case HT_EVENT_OPT_REQUIRED_CAP_RETRY:
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printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_RETRY, Socket %lx Link %lx Depth %lx\n",
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printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_RETRY, Socket %x Link %x Depth %x\n",
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event->DataParam1,
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event->DataParam1,
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event->DataParam2,
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event->DataParam2,
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event->DataParam3);
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event->DataParam3);
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break;
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break;
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case HT_EVENT_OPT_REQUIRED_CAP_GEN3:
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case HT_EVENT_OPT_REQUIRED_CAP_GEN3:
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printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_GEN3, Socket %lx Link %lx Depth %lx\n",
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printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_GEN3, Socket %x Link %x Depth %x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3);
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(unsigned int)event->DataParam3);
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break;
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break;
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case HT_EVENT_OPT_UNUSED_LINKS:
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case HT_EVENT_OPT_UNUSED_LINKS:
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printk(BIOS_DEBUG, "HT_EVENT_OPT_UNUSED_LINKS, SocketA%lx LinkA%lx SocketB%lx LinkB%lx\n",
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printk(BIOS_DEBUG, "HT_EVENT_OPT_UNUSED_LINKS, SocketA%x LinkA%x SocketB%x LinkB%x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3,
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(unsigned int)event->DataParam3,
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event->DataParam4);
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(unsigned int)event->DataParam4);
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break;
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break;
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case HT_EVENT_OPT_LINK_PAIR_EXCEED:
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case HT_EVENT_OPT_LINK_PAIR_EXCEED:
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printk(BIOS_DEBUG, "HT_EVENT_OPT_LINK_PAIR_EXCEED, SocketA%lx MasterLink%lx SocketB%lx AltLink%lx\n",
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printk(BIOS_DEBUG, "HT_EVENT_OPT_LINK_PAIR_EXCEED, SocketA%x MasterLink%x SocketB%x AltLink%x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3,
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(unsigned int)event->DataParam3,
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event->DataParam4);
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(unsigned int)event->DataParam4);
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default:
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default:
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break;
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break;
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}
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}
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@ -776,10 +776,10 @@ static void agesa_error(EVENT_PARAMS *event)
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switch (event->EventInfo >> 24) {
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switch (event->EventInfo >> 24) {
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case 0x04:
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case 0x04:
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printk(BIOS_DEBUG, "Memory: Socket %lx Dct %lx Channel%lx ",
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printk(BIOS_DEBUG, "Memory: Socket %x Dct %x Channel%x ",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3);
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(unsigned int)event->DataParam3);
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break;
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break;
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case 0x08:
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case 0x08:
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@ -943,47 +943,47 @@ static void agesa_error(EVENT_PARAMS *event)
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} else if ((event->EventInfo & 0x000000FF) == 0x07) {
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} else if ((event->EventInfo & 0x000000FF) == 0x07) {
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printk(BIOS_DEBUG, "AGESA_DEALLOCATE_CACHE_REGIONS\n");
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printk(BIOS_DEBUG, "AGESA_DEALLOCATE_CACHE_REGIONS\n");
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}
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}
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printk(BIOS_DEBUG, "cache region index:%lx, start:%lx size:%lx\n",
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printk(BIOS_DEBUG, "cache region index:%x, start:%x size:%x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3);
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(unsigned int)event->DataParam3);
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break;
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break;
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case HT_EVENT_COH_NO_TOPOLOGY:
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case HT_EVENT_COH_NO_TOPOLOGY:
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printk(BIOS_DEBUG, "no Matching Topology was found during coherent initializatio TotalHtNodes: %lx\n",
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printk(BIOS_DEBUG, "no Matching Topology was found during coherent initializatio TotalHtNodes: %x\n",
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event->DataParam1);
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(unsigned int)event->DataParam1);
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break;
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break;
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case HT_EVENT_NCOH_BUID_EXCEED:
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case HT_EVENT_NCOH_BUID_EXCEED:
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printk(BIOS_DEBUG, "there is a limit of 32 unit IDs per chain Socket%lx Link%lx Depth%lx"
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printk(BIOS_DEBUG, "there is a limit of 32 unit IDs per chain Socket%x Link%x Depth%x"
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"Current BUID: %lx, Unit Count: %lx\n",
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"Current BUID: %x, Unit Count: %x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3,
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(unsigned int)event->DataParam3,
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event->DataParam4 >> 16,
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(unsigned int)event->DataParam4 >> 16,
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event->DataParam4 & 0x0000FFFF);
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(unsigned int)event->DataParam4 & 0x0000FFFF);
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break;
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break;
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case HT_EVENT_NCOH_BUS_MAX_EXCEED:
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case HT_EVENT_NCOH_BUS_MAX_EXCEED:
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printk(BIOS_DEBUG, "maximum auto bus limit exceeded, Socket %lx Link %lx Bus %lx\n",
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printk(BIOS_DEBUG, "maximum auto bus limit exceeded, Socket %x Link %x Bus %x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3);
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(unsigned int)event->DataParam3);
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break;
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break;
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case HT_EVENT_NCOH_CFG_MAP_EXCEED:
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case HT_EVENT_NCOH_CFG_MAP_EXCEED:
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printk(BIOS_DEBUG, "there is a limit of four non-coherent chains, Socket %lx Link %lx\n",
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printk(BIOS_DEBUG, "there is a limit of four non-coherent chains, Socket %x Link %x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2);
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(unsigned int)event->DataParam2);
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break;
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break;
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case HT_EVENT_NCOH_DEVICE_FAILED:
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case HT_EVENT_NCOH_DEVICE_FAILED:
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printk(BIOS_DEBUG, "after assigning an IO Device an ID, it does not respond at the new ID"
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printk(BIOS_DEBUG, "after assigning an IO Device an ID, it does not respond at the new ID"
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"Socket %lx Link %lx Depth %lx DeviceID %lx\n",
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"Socket %x Link %x Depth %x DeviceID %x\n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
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(unsigned int)event->DataParam2,
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event->DataParam3,
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(unsigned int)event->DataParam3,
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event->DataParam4);
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(unsigned int)event->DataParam4);
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default:
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default:
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break;
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break;
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}
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}
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@ -995,33 +995,33 @@ static void agesa_critical(EVENT_PARAMS *event)
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{
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{
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switch (event->EventInfo) {
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switch (event->EventInfo) {
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case MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR3:
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case MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR3:
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printk(BIOS_DEBUG, "Socket: %lx, Heap allocation error for DMI table for DDR3\n",
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printk(BIOS_DEBUG, "Socket: %x, Heap allocation error for DMI table for DDR3\n",
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event->DataParam1);
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(unsigned int)event->DataParam1);
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break;
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break;
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|
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case MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR2:
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case MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR2:
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printk(BIOS_DEBUG, "Socket: %lx, Heap allocation error for DMI table for DDR2\n",
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printk(BIOS_DEBUG, "Socket: %x, Heap allocation error for DMI table for DDR2\n",
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event->DataParam1);
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(unsigned int)event->DataParam1);
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break;
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break;
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|
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case MEM_ERROR_UNSUPPORTED_DIMM_CONFIG:
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case MEM_ERROR_UNSUPPORTED_DIMM_CONFIG:
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printk(BIOS_DEBUG, "Socket: %lx, Dimm population is not supported\n",
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printk(BIOS_DEBUG, "Socket: %x, Dimm population is not supported\n",
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event->DataParam1);
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(unsigned int)event->DataParam1);
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break;
|
break;
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|
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case HT_EVENT_COH_PROCESSOR_TYPE_MIX:
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case HT_EVENT_COH_PROCESSOR_TYPE_MIX:
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printk(BIOS_DEBUG, "Socket %lx Link %lx TotalSockets %lx, HT_EVENT_COH_PROCESSOR_TYPE_MIX \n",
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printk(BIOS_DEBUG, "Socket %x Link %x TotalSockets %x, HT_EVENT_COH_PROCESSOR_TYPE_MIX \n",
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event->DataParam1,
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(unsigned int)event->DataParam1,
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event->DataParam2,
|
(unsigned int)event->DataParam2,
|
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event->DataParam3);
|
(unsigned int)event->DataParam3);
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break;
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break;
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|
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case HT_EVENT_COH_MPCAP_MISMATCH:
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case HT_EVENT_COH_MPCAP_MISMATCH:
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printk(BIOS_DEBUG, "Socket %lx Link %lx MpCap %lx TotalSockets %lx, HT_EVENT_COH_MPCAP_MISMATCH\n",
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printk(BIOS_DEBUG, "Socket %x Link %x MpCap %x TotalSockets %x, HT_EVENT_COH_MPCAP_MISMATCH\n",
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event->DataParam1,
|
(unsigned int)event->DataParam1,
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event->DataParam2,
|
(unsigned int)event->DataParam2,
|
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event->DataParam3,
|
(unsigned int)event->DataParam3,
|
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event->DataParam4);
|
(unsigned int)event->DataParam4);
|
||||||
default:
|
default:
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break;
|
break;
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||||||
}
|
}
|
||||||
|
@ -1035,10 +1035,10 @@ static void agesa_fatal(EVENT_PARAMS *event)
|
||||||
|
|
||||||
switch (event->EventInfo >> 24) {
|
switch (event->EventInfo >> 24) {
|
||||||
case 0x04:
|
case 0x04:
|
||||||
printk(BIOS_DEBUG, "Memory: Socket %lx Dct %lx Channel%lx ",
|
printk(BIOS_DEBUG, "Memory: Socket %x Dct %x Channel%x ",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x08:
|
case 0x08:
|
||||||
|
@ -1114,8 +1114,8 @@ static void agesa_fatal(EVENT_PARAMS *event)
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case CPU_EVENT_PM_ALL_PSTATE_OVERCURRENT:
|
case CPU_EVENT_PM_ALL_PSTATE_OVERCURRENT:
|
||||||
printk(BIOS_DEBUG, "Socket: %lx, All PStates exceeded the motherboard current limit on specified socket\n",
|
printk(BIOS_DEBUG, "Socket: %x, All PStates exceeded the motherboard current limit on specified socket\n",
|
||||||
event->DataParam1);
|
(unsigned int)event->DataParam1);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
|
@ -1181,9 +1181,15 @@ UINT32 agesawrapper_amdreadeventlog(UINT8 HeapStatus)
|
||||||
AmdEventParams.StdHeader.HeapStatus = HeapStatus;
|
AmdEventParams.StdHeader.HeapStatus = HeapStatus;
|
||||||
Status = AmdReadEventLog(&AmdEventParams);
|
Status = AmdReadEventLog(&AmdEventParams);
|
||||||
while (AmdEventParams.EventClass != 0) {
|
while (AmdEventParams.EventClass != 0) {
|
||||||
printk(BIOS_DEBUG,"\nEventLog: EventClass = %lx, EventInfo = %lx.\n",AmdEventParams.EventClass,AmdEventParams.EventInfo);
|
printk(BIOS_DEBUG,"\nEventLog: EventClass = %x, EventInfo = %x.\n",
|
||||||
printk(BIOS_DEBUG," Param1 = %lx, Param2 = %lx.\n",AmdEventParams.DataParam1,AmdEventParams.DataParam2);
|
(unsigned int)AmdEventParams.EventClass,
|
||||||
printk(BIOS_DEBUG," Param3 = %lx, Param4 = %lx.\n",AmdEventParams.DataParam3,AmdEventParams.DataParam4);
|
(unsigned int)AmdEventParams.EventInfo);
|
||||||
|
printk(BIOS_DEBUG," Param1 = %x, Param2 = %x.\n",
|
||||||
|
(unsigned int)AmdEventParams.DataParam1,
|
||||||
|
(unsigned int)AmdEventParams.DataParam2);
|
||||||
|
printk(BIOS_DEBUG," Param3 = %x, Param4 = %x.\n",
|
||||||
|
(unsigned int)AmdEventParams.DataParam3,
|
||||||
|
(unsigned int)AmdEventParams.DataParam4);
|
||||||
interpret_agesa_eventlog(&AmdEventParams);
|
interpret_agesa_eventlog(&AmdEventParams);
|
||||||
Status = AmdReadEventLog(&AmdEventParams);
|
Status = AmdReadEventLog(&AmdEventParams);
|
||||||
}
|
}
|
||||||
|
|
|
@ -276,7 +276,7 @@ UINT32 agesawrapper_amdinitearly(VOID)
|
||||||
|
|
||||||
GetCpuServicesOfCurrentCore((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdParamStruct.StdHeader);
|
GetCpuServicesOfCurrentCore((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdParamStruct.StdHeader);
|
||||||
FamilySpecificServices->GetTscRate(FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader);
|
FamilySpecificServices->GetTscRate(FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader);
|
||||||
printk(BIOS_DEBUG, "BSP Frequency: %luMHz\n", TscRateInMhz);
|
printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz);
|
||||||
|
|
||||||
AmdReleaseStruct(&AmdParamStruct);
|
AmdReleaseStruct(&AmdParamStruct);
|
||||||
return (UINT32)status;
|
return (UINT32)status;
|
||||||
|
@ -329,7 +329,7 @@ UINT32 agesawrapper_amdinitpost(VOID)
|
||||||
|
|
||||||
GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdParamStruct.StdHeader);
|
GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdParamStruct.StdHeader);
|
||||||
FamilySpecificServices->GetTscRate (FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader);
|
FamilySpecificServices->GetTscRate (FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader);
|
||||||
printk(BIOS_DEBUG, "BSP Frequency: %luMHz\n", TscRateInMhz);
|
printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz);
|
||||||
|
|
||||||
return (UINT32)status;
|
return (UINT32)status;
|
||||||
}
|
}
|
||||||
|
@ -537,47 +537,47 @@ static void agesa_alert(EVENT_PARAMS *event)
|
||||||
{
|
{
|
||||||
switch (event->EventInfo) {
|
switch (event->EventInfo) {
|
||||||
case MEM_ALERT_USER_TMG_MODE_OVERRULED:
|
case MEM_ALERT_USER_TMG_MODE_OVERRULED:
|
||||||
printk(BIOS_DEBUG, "Socket %lx Dct %lx Channel %lx "
|
printk(BIOS_DEBUG, "Socket %x Dct %x Channel %x "
|
||||||
"TIMING_MODE_SPECIFIC is requested but can not be applied to current configurations.\n",
|
"TIMING_MODE_SPECIFIC is requested but can not be applied to current configurations.\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case MEM_ALERT_ORG_MISMATCH_DIMM:
|
case MEM_ALERT_ORG_MISMATCH_DIMM:
|
||||||
printk(BIOS_DEBUG, "Socket %lx Dct %lx Channel %lx "
|
printk(BIOS_DEBUG, "Socket %x Dct %x Channel %x "
|
||||||
"DIMM organization miss-match\n",
|
"DIMM organization miss-match\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case MEM_ALERT_BK_INT_DIS:
|
case MEM_ALERT_BK_INT_DIS:
|
||||||
printk(BIOS_DEBUG, "Socket %lx Dct %lx Channel %lx "
|
printk(BIOS_DEBUG, "Socket %x Dct %x Channel %x "
|
||||||
"Bank interleaving disable for internal issue\n",
|
"Bank interleaving disable for internal issue\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case CPU_EVENT_BIST_ERROR:
|
case CPU_EVENT_BIST_ERROR:
|
||||||
printk(BIOS_DEBUG, "BIST error: %lx reported on Socket %lx Core %lx\n",
|
printk(BIOS_DEBUG, "BIST error: %x reported on Socket %x Core %x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case HT_EVENT_HW_SYNCFLOOD:
|
case HT_EVENT_HW_SYNCFLOOD:
|
||||||
printk(BIOS_DEBUG, "HT_EVENT_DATA_HW_SYNCFLOOD error on Socket %lx Link %lx\n",
|
printk(BIOS_DEBUG, "HT_EVENT_DATA_HW_SYNCFLOOD error on Socket %x Link %x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2);
|
(unsigned int)event->DataParam2);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case HT_EVENT_HW_HTCRC:
|
case HT_EVENT_HW_HTCRC:
|
||||||
printk(BIOS_DEBUG, "HT_EVENT_HW_HTCRC error on Socket %lx Link %lx Lanemask:%lx\n",
|
printk(BIOS_DEBUG, "HT_EVENT_HW_HTCRC error on Socket %x Link %x Lanemask:%x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
|
@ -602,10 +602,10 @@ static void agesa_warning(EVENT_PARAMS *event)
|
||||||
|
|
||||||
switch (event->EventInfo >> 24) {
|
switch (event->EventInfo >> 24) {
|
||||||
case 0x04:
|
case 0x04:
|
||||||
printk(BIOS_DEBUG, "Memory: Socket %lx Dct %lx Channel%lx ",
|
printk(BIOS_DEBUG, "Memory: Socket %x Dct %x Channel%x ",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x08:
|
case 0x08:
|
||||||
|
@ -702,24 +702,24 @@ static void agesa_warning(EVENT_PARAMS *event)
|
||||||
} else if ((event->EventInfo & 0x000000FF) == 0x03) {
|
} else if ((event->EventInfo & 0x000000FF) == 0x03) {
|
||||||
printk(BIOS_DEBUG, "AGESA_CACHE_REGIONS_ACROSS_4GB\n");
|
printk(BIOS_DEBUG, "AGESA_CACHE_REGIONS_ACROSS_4GB\n");
|
||||||
}
|
}
|
||||||
printk(BIOS_DEBUG, "cache region index:%lx, start:%lx size:%lx\n",
|
printk(BIOS_DEBUG, "cache region index:%x, start:%x size:%x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case CPU_WARNING_ADJUSTED_LEVELING_MODE:
|
case CPU_WARNING_ADJUSTED_LEVELING_MODE:
|
||||||
printk(BIOS_DEBUG, "CPU_WARNING_ADJUSTED_LEVELING_MODE "
|
printk(BIOS_DEBUG, "CPU_WARNING_ADJUSTED_LEVELING_MODE "
|
||||||
"requested: %lx, actual level:%lx\n",
|
"requested: %x, actual level:%x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2);
|
(unsigned int)event->DataParam2);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case CPU_EVENT_PM_PSTATE_OVERCURRENT:
|
case CPU_EVENT_PM_PSTATE_OVERCURRENT:
|
||||||
printk(BIOS_DEBUG, "CPU_EVENT_PM_PSTATE_OVERCURRENT "
|
printk(BIOS_DEBUG, "CPU_EVENT_PM_PSTATE_OVERCURRENT "
|
||||||
"Socket: %lx, Pstate:%lx\n",
|
"Socket: %x, Pstate:%x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2);
|
(unsigned int)event->DataParam2);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case CPU_WARNING_NONOPTIMAL_HT_ASSIST_CFG:
|
case CPU_WARNING_NONOPTIMAL_HT_ASSIST_CFG:
|
||||||
|
@ -735,34 +735,34 @@ static void agesa_warning(EVENT_PARAMS *event)
|
||||||
*/
|
*/
|
||||||
|
|
||||||
case HT_EVENT_OPT_REQUIRED_CAP_RETRY:
|
case HT_EVENT_OPT_REQUIRED_CAP_RETRY:
|
||||||
printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_RETRY, Socket %lx Link %lx Depth %lx\n",
|
printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_RETRY, Socket %x Link %x Depth %x\n",
|
||||||
event->DataParam1,
|
event->DataParam1,
|
||||||
event->DataParam2,
|
event->DataParam2,
|
||||||
event->DataParam3);
|
event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case HT_EVENT_OPT_REQUIRED_CAP_GEN3:
|
case HT_EVENT_OPT_REQUIRED_CAP_GEN3:
|
||||||
printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_GEN3, Socket %lx Link %lx Depth %lx\n",
|
printk(BIOS_DEBUG, "HT_EVENT_OPT_REQUIRED_CAP_GEN3, Socket %x Link %x Depth %x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case HT_EVENT_OPT_UNUSED_LINKS:
|
case HT_EVENT_OPT_UNUSED_LINKS:
|
||||||
printk(BIOS_DEBUG, "HT_EVENT_OPT_UNUSED_LINKS, SocketA%lx LinkA%lx SocketB%lx LinkB%lx\n",
|
printk(BIOS_DEBUG, "HT_EVENT_OPT_UNUSED_LINKS, SocketA%x LinkA%x SocketB%x LinkB%x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3,
|
(unsigned int)event->DataParam3,
|
||||||
event->DataParam4);
|
(unsigned int)event->DataParam4);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case HT_EVENT_OPT_LINK_PAIR_EXCEED:
|
case HT_EVENT_OPT_LINK_PAIR_EXCEED:
|
||||||
printk(BIOS_DEBUG, "HT_EVENT_OPT_LINK_PAIR_EXCEED, SocketA%lx MasterLink%lx SocketB%lx AltLink%lx\n",
|
printk(BIOS_DEBUG, "HT_EVENT_OPT_LINK_PAIR_EXCEED, SocketA%x MasterLink%x SocketB%x AltLink%x\n",
|
||||||
|
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3,
|
(unsigned int)event->DataParam3,
|
||||||
event->DataParam4);
|
(unsigned int)event->DataParam4);
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -776,10 +776,10 @@ static void agesa_error(EVENT_PARAMS *event)
|
||||||
|
|
||||||
switch (event->EventInfo >> 24) {
|
switch (event->EventInfo >> 24) {
|
||||||
case 0x04:
|
case 0x04:
|
||||||
printk(BIOS_DEBUG, "Memory: Socket %lx Dct %lx Channel%lx ",
|
printk(BIOS_DEBUG, "Memory: Socket %x Dct %x Channel%x ",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x08:
|
case 0x08:
|
||||||
|
@ -943,47 +943,47 @@ static void agesa_error(EVENT_PARAMS *event)
|
||||||
} else if ((event->EventInfo & 0x000000FF) == 0x07) {
|
} else if ((event->EventInfo & 0x000000FF) == 0x07) {
|
||||||
printk(BIOS_DEBUG, "AGESA_DEALLOCATE_CACHE_REGIONS\n");
|
printk(BIOS_DEBUG, "AGESA_DEALLOCATE_CACHE_REGIONS\n");
|
||||||
}
|
}
|
||||||
printk(BIOS_DEBUG, "cache region index:%lx, start:%lx size:%lx\n",
|
printk(BIOS_DEBUG, "cache region index:%x, start:%x size:%x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case HT_EVENT_COH_NO_TOPOLOGY:
|
case HT_EVENT_COH_NO_TOPOLOGY:
|
||||||
printk(BIOS_DEBUG, "no Matching Topology was found during coherent initializatio TotalHtNodes: %lx\n",
|
printk(BIOS_DEBUG, "no Matching Topology was found during coherent initializatio TotalHtNodes: %x\n",
|
||||||
event->DataParam1);
|
(unsigned int)event->DataParam1);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case HT_EVENT_NCOH_BUID_EXCEED:
|
case HT_EVENT_NCOH_BUID_EXCEED:
|
||||||
printk(BIOS_DEBUG, "there is a limit of 32 unit IDs per chain Socket%lx Link%lx Depth%lx"
|
printk(BIOS_DEBUG, "there is a limit of 32 unit IDs per chain Socket%x Link%x Depth%x"
|
||||||
"Current BUID: %lx, Unit Count: %lx\n",
|
"Current BUID: %x, Unit Count: %x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3,
|
(unsigned int)event->DataParam3,
|
||||||
event->DataParam4 >> 16,
|
(unsigned int)event->DataParam4 >> 16,
|
||||||
event->DataParam4 & 0x0000FFFF);
|
(unsigned int)event->DataParam4 & 0x0000FFFF);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case HT_EVENT_NCOH_BUS_MAX_EXCEED:
|
case HT_EVENT_NCOH_BUS_MAX_EXCEED:
|
||||||
printk(BIOS_DEBUG, "maximum auto bus limit exceeded, Socket %lx Link %lx Bus %lx\n",
|
printk(BIOS_DEBUG, "maximum auto bus limit exceeded, Socket %x Link %x Bus %x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case HT_EVENT_NCOH_CFG_MAP_EXCEED:
|
case HT_EVENT_NCOH_CFG_MAP_EXCEED:
|
||||||
printk(BIOS_DEBUG, "there is a limit of four non-coherent chains, Socket %lx Link %lx\n",
|
printk(BIOS_DEBUG, "there is a limit of four non-coherent chains, Socket %x Link %x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2);
|
(unsigned int)event->DataParam2);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case HT_EVENT_NCOH_DEVICE_FAILED:
|
case HT_EVENT_NCOH_DEVICE_FAILED:
|
||||||
printk(BIOS_DEBUG, "after assigning an IO Device an ID, it does not respond at the new ID"
|
printk(BIOS_DEBUG, "after assigning an IO Device an ID, it does not respond at the new ID"
|
||||||
"Socket %lx Link %lx Depth %lx DeviceID %lx\n",
|
"Socket %x Link %x Depth %x DeviceID %x\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3,
|
(unsigned int)event->DataParam3,
|
||||||
event->DataParam4);
|
(unsigned int)event->DataParam4);
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -995,33 +995,33 @@ static void agesa_critical(EVENT_PARAMS *event)
|
||||||
{
|
{
|
||||||
switch (event->EventInfo) {
|
switch (event->EventInfo) {
|
||||||
case MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR3:
|
case MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR3:
|
||||||
printk(BIOS_DEBUG, "Socket: %lx, Heap allocation error for DMI table for DDR3\n",
|
printk(BIOS_DEBUG, "Socket: %x, Heap allocation error for DMI table for DDR3\n",
|
||||||
event->DataParam1);
|
(unsigned int)event->DataParam1);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR2:
|
case MEM_ERROR_HEAP_ALLOCATE_FOR_DMI_TABLE_DDR2:
|
||||||
printk(BIOS_DEBUG, "Socket: %lx, Heap allocation error for DMI table for DDR2\n",
|
printk(BIOS_DEBUG, "Socket: %x, Heap allocation error for DMI table for DDR2\n",
|
||||||
event->DataParam1);
|
(unsigned int)event->DataParam1);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case MEM_ERROR_UNSUPPORTED_DIMM_CONFIG:
|
case MEM_ERROR_UNSUPPORTED_DIMM_CONFIG:
|
||||||
printk(BIOS_DEBUG, "Socket: %lx, Dimm population is not supported\n",
|
printk(BIOS_DEBUG, "Socket: %x, Dimm population is not supported\n",
|
||||||
event->DataParam1);
|
(unsigned int)event->DataParam1);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case HT_EVENT_COH_PROCESSOR_TYPE_MIX:
|
case HT_EVENT_COH_PROCESSOR_TYPE_MIX:
|
||||||
printk(BIOS_DEBUG, "Socket %lx Link %lx TotalSockets %lx, HT_EVENT_COH_PROCESSOR_TYPE_MIX \n",
|
printk(BIOS_DEBUG, "Socket %x Link %x TotalSockets %x, HT_EVENT_COH_PROCESSOR_TYPE_MIX \n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case HT_EVENT_COH_MPCAP_MISMATCH:
|
case HT_EVENT_COH_MPCAP_MISMATCH:
|
||||||
printk(BIOS_DEBUG, "Socket %lx Link %lx MpCap %lx TotalSockets %lx, HT_EVENT_COH_MPCAP_MISMATCH\n",
|
printk(BIOS_DEBUG, "Socket %x Link %x MpCap %x TotalSockets %x, HT_EVENT_COH_MPCAP_MISMATCH\n",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3,
|
(unsigned int)event->DataParam3,
|
||||||
event->DataParam4);
|
(unsigned int)event->DataParam4);
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -1035,10 +1035,10 @@ static void agesa_fatal(EVENT_PARAMS *event)
|
||||||
|
|
||||||
switch (event->EventInfo >> 24) {
|
switch (event->EventInfo >> 24) {
|
||||||
case 0x04:
|
case 0x04:
|
||||||
printk(BIOS_DEBUG, "Memory: Socket %lx Dct %lx Channel%lx ",
|
printk(BIOS_DEBUG, "Memory: Socket %x Dct %x Channel%x ",
|
||||||
event->DataParam1,
|
(unsigned int)event->DataParam1,
|
||||||
event->DataParam2,
|
(unsigned int)event->DataParam2,
|
||||||
event->DataParam3);
|
(unsigned int)event->DataParam3);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x08:
|
case 0x08:
|
||||||
|
@ -1114,8 +1114,8 @@ static void agesa_fatal(EVENT_PARAMS *event)
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case CPU_EVENT_PM_ALL_PSTATE_OVERCURRENT:
|
case CPU_EVENT_PM_ALL_PSTATE_OVERCURRENT:
|
||||||
printk(BIOS_DEBUG, "Socket: %lx, All PStates exceeded the motherboard current limit on specified socket\n",
|
printk(BIOS_DEBUG, "Socket: %x, All PStates exceeded the motherboard current limit on specified socket\n",
|
||||||
event->DataParam1);
|
(unsigned int)event->DataParam1);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
|
@ -1181,9 +1181,15 @@ UINT32 agesawrapper_amdreadeventlog(UINT8 HeapStatus)
|
||||||
AmdEventParams.StdHeader.HeapStatus = HeapStatus;
|
AmdEventParams.StdHeader.HeapStatus = HeapStatus;
|
||||||
Status = AmdReadEventLog(&AmdEventParams);
|
Status = AmdReadEventLog(&AmdEventParams);
|
||||||
while (AmdEventParams.EventClass != 0) {
|
while (AmdEventParams.EventClass != 0) {
|
||||||
printk(BIOS_DEBUG,"\nEventLog: EventClass = %lx, EventInfo = %lx.\n",AmdEventParams.EventClass,AmdEventParams.EventInfo);
|
printk(BIOS_DEBUG,"\nEventLog: EventClass = %x, EventInfo = %x.\n",
|
||||||
printk(BIOS_DEBUG," Param1 = %lx, Param2 = %lx.\n",AmdEventParams.DataParam1,AmdEventParams.DataParam2);
|
(unsigned int)AmdEventParams.EventClass,
|
||||||
printk(BIOS_DEBUG," Param3 = %lx, Param4 = %lx.\n",AmdEventParams.DataParam3,AmdEventParams.DataParam4);
|
(unsigned int)AmdEventParams.EventInfo);
|
||||||
|
printk(BIOS_DEBUG," Param1 = %x, Param2 = %x.\n",
|
||||||
|
(unsigned int)AmdEventParams.DataParam1,
|
||||||
|
(unsigned int)AmdEventParams.DataParam2);
|
||||||
|
printk(BIOS_DEBUG," Param3 = %x, Param4 = %x.\n",
|
||||||
|
(unsigned int)AmdEventParams.DataParam3,
|
||||||
|
(unsigned int)AmdEventParams.DataParam4);
|
||||||
interpret_agesa_eventlog(&AmdEventParams);
|
interpret_agesa_eventlog(&AmdEventParams);
|
||||||
Status = AmdReadEventLog(&AmdEventParams);
|
Status = AmdReadEventLog(&AmdEventParams);
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue